PIC24FJ64GA102-I/ML Microchip Technology, PIC24FJ64GA102-I/ML Datasheet - Page 55
![IC MCU 16BIT 64KB FLASH 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC24FJ64GA102-I/ML
Manufacturer Part Number
PIC24FJ64GA102-I/ML
Description
IC MCU 16BIT 64KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheets
1.PIC24FJ32GA102-ISP.pdf
(308 pages)
2.PIC24FJ32GA102-ISP.pdf
(12 pages)
3.PIC24FJ32GA102-ISP.pdf
(48 pages)
4.PIC24FJ64GA104-IML.pdf
(300 pages)
Specifications of PIC24FJ64GA102-I/ML
Core Size
16-Bit
Program Memory Size
64KB (22K x 24)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC24
Ram Memory Size
8KB
Cpu Speed
32MHz
No. Of Timers
5
Interface
I2C, LIN, SPI, USART
No. Of Pwm Channels
5
Embedded Interface Type
I2C, LIN, SPI, USART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ64GA102-I/ML
Manufacturer:
MAXIM
Quantity:
15 620
- PIC24FJ32GA102-ISP PDF datasheet
- PIC24FJ32GA102-ISP PDF datasheet #2
- PIC24FJ32GA102-ISP PDF datasheet #3
- PIC24FJ64GA104-IML PDF datasheet #4
- Current page: 55 of 300
- Download datasheet (5Mb)
5.6.2
If a Flash location has been erased, it can be pro-
grammed using table write instructions to write an
instruction word (24-bit) into the write latch. The
TBLPAG register is loaded with the 8 Most Significant
Bytes of the Flash address. The TBLWTL and TBLWTH
EXAMPLE 5-7:
EXAMPLE 5-8:
© 2009 Microchip Technology Inc.
; Setup a pointer to data Program Memory
; Setup NVMCON for programming one word to data Program Memory
// C example using MPLAB C30
//Set up NVMCON for word programming
//Set up pointer to the first memory location to be written
//Perform TBLWT instructions to write latches
MOV
MOV
MOV
MOV
MOV
TBLWTL W2, [W0]
TBLWTH W3, [W0++]
MOV
MOV
DISI
MOV
MOV
MOV
MOV
BSET
NOP
NOP
unsigned int offset;
unsigned long progAddr = 0xXXXXXX;
unsigned int progDataL = 0xXXXX;
unsigned char progDataH = 0xXX;
NVMCON = 0x4003;
TBLPAG = progAddr>>16;
offset = progAddr & 0xFFFF;
__builtin_tblwtl(offset, progDataL);
__builtin_tblwth(offset, progDataH);
asm(“DISI #5”);
__builtin_write_NVM();
PROGRAMMING A SINGLE WORD
OF FLASH PROGRAM MEMORY
#tblpage(PROG_ADDR), W0
W0, TBLPAG
#tbloffset(PROG_ADDR), W0
#LOW_WORD, W2
#HIGH_BYTE, W3
#0x4003, W0
W0, NVMCON
#5
#0x55, W0
W0, NVMKEY
#0xAA, W0
W0, NVMKEY
NVMCON, #WR
PROGRAMMING A SINGLE WORD OF FLASH PROGRAM MEMORY (ASSEMBLY
LANGUAGE CODE)
PROGRAMMING A SINGLE WORD OF FLASH PROGRAM MEMORY
(C LANGUAGE CODE)
PIC24FJ64GA104 FAMILY
Preliminary
;
;Initialize PM Page Boundary SFR
;Initialize a register with program memory address
;
;
; Write PM low word into program latch
; Write PM high byte into program latch
;
; Set NVMOP bits to 0011
; Disable interrupts while the KEY sequence is written
; Write the key sequence
; Start the write cycle
; Insert two NOPs after the erase
; Command is asserted
// Address of word to program
// Data to program lower word
// Data to program upper byte
// Initialize NVMCON
// Initialize PM Page Boundary SFR
// Initialize lower word of address
// Write to address low word
// Write to upper byte
// Block interrupts with priority < 7
// for next 5 instructions
// C30 function to perform unlock
// sequence and set WR
instructions write the desired data into the write latches
and specify the lower 16 bits of the program memory
address to write to. To configure the NVMCON register
for a word write, set the NVMOP bits (NVMCON<3:0>)
to ‘0011’. The write is performed by executing the
unlock sequence and setting the WR bit (see
Example 5-7).
DS39951B-page 53
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