DSPIC30F1010-30I/SO Microchip Technology, DSPIC30F1010-30I/SO Datasheet

IC DSPIC MCU/DSP 6K 28SOIC

DSPIC30F1010-30I/SO

Manufacturer Part Number
DSPIC30F1010-30I/SO
Description
IC DSPIC MCU/DSP 6K 28SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F1010-30I/SO

Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
6KB (2K x 24)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240002, DM300023, DM330011
Package
28SOIC W
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
30 MHz
Operating Supply Voltage
3.3|5 V
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
6-chx10-bit
Number Of Timers
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM300023 - KIT DEMO DSPICDEM SMPS BUCKDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

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The dsPIC30F1010/202X (Rev. A2) devices that you
received were found to conform to the specifications
and functionality described in the following documents:
• dsPIC30F1010/202X Family Data Sheet
• dsPIC30F/33F Programmer’s Reference Manual
• dsPIC30F Family Reference Manual (DS70046)
The exceptions to the specifications in the documents
listed above are described in this section. These
exceptions are described for the devices listed below:
• dsPIC30F1010
• dsPIC30F2020
• dsPIC33F2023
dsPIC30F1010/202X Rev. A2 silicon is identified by
performing a “Reset and Connect” operation to the
device using MPLAB
or later. The output window will show a successful
connection to the device specified in Configure>Select
Device.
The errata described in this section will be addressed
in future revisions of silicon.
© 2008 Microchip Technology Inc.
(DS70178)
(DS70157)
dsPIC30F1010/202X Rev. A2 Silicon Errata
®
ICD 2 with MPLAB IDE v7.41.03
dsPIC30F1010/202X
Silicon Errata Summary
The following list summarizes the errata described in
this document:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. ADC Interrupts
11. ADC Conversion Rate
PWM Dead Time
If a value less than 0x0010 is written to the DTRx
and ALTDTRx registers, either or both of the
PWMHx and PWMLx outputs will not function.
PWM Duty Cycle
Duty cycle resolution is not 1.1 ns over the entire
duty cycle range.
PWM Triggers
The PWM Special Event Trigger and PWM
Individual Trigger do not function near the
beginning of the PWM period.
PWM Override Enable
The PWM override feature does not work
correctly.
PWM Duty Cycle
When the PWM module is operated with
Immediate Duty Cycle updates enabled, any duty
cycle value less than or equal to 0x0010 causes
the PWM outputs to flip to the inverted state.
PWM Override Priority
The PWM Fault, Current-Limit, and Output
Override priorities do not work correctly.
PWM Jitter
The PWM output may exhibit an occasional jitter
proportional to the operating speed of the
dsPIC30F1010/202X device.
ADC Global Software Trigger
The Global Software Trigger bit (GSWTRG in the
ADCON register) is not reset unless the PxRDY
bits in the ADSTAT register are reset.
ADC Sample and Hold Timing
The resolution of the PWM to ADC sample and
hold trigger timing is 41.6 ns instead of the 8 ns
specified in the device data sheet.
Individual ADC Interrupts for the ADC pin pairs do
not work.
The maximum conversion rate for the ADC module
is 1.5 Msps.
DS80319D-page 1

Related parts for DSPIC30F1010-30I/SO

DSPIC30F1010-30I/SO Summary of contents

Page 1

... These exceptions are described for the devices listed below: • dsPIC30F1010 • dsPIC30F2020 • dsPIC33F2023 dsPIC30F1010/202X Rev. A2 silicon is identified by performing a “Reset and Connect” operation to the ® device using MPLAB ICD 2 with MPLAB IDE v7.41.03 or later. The output window will show a successful connection to the device specified in Configure> ...

Page 2

... ADC Shared Sample and Hold Circuit Depending on conversion configuration, ADC inputs that do not have dedicated sample and hold circuits may produce inaccurate conversion results. 13. Current Reset Mode Setting the XPRES bit in the PWMCONx register should enable a current-limit source to reset the PWM period when the PWM generated is configured in Independent Time Base mode ...

Page 3

... I C Module The BCL bit in I2CSTAT can be cleared only with 16-bit operation and can be corrupted with 1-bit or 8-bit operations on I2CSTAT. © 2008 Microchip Technology Inc. dsPIC30F1010/202X 2 42 Module: 10-bit addressing mode 2 When the I C module is configured for 10-bit addressing using the same address bits (A10 and ...

Page 4

... Module: Power Supply PWM: Dead Time If dead time functionality (DTC<1:0> the PWMCONx register), the minimum usable value that can be written to the dead time registers, DTRx and ALTDTRx, is 0x0010. Writing a value less than 0x0010 will cause either or both the PWMxH and PWMxL outputs not to function ...

Page 5

... The Power Supply PWM module has a feature to enable immediate duty cycle updates. This feature is enabled by setting IUE = 1 in the PWMCONx register. The dsPIC30F1010/202X Device Data Sheet states that the minimum PWM duty cycle value is 0x0010. Duty cycle values less than 0x0010 should cause the PWM outputs to display states corresponding to a duty cycle value of 0x0000 ...

Page 6

... Module: PWM Jitter The outputs of the PWM module may exhibit a jitter proportional to the speed of operation of the device. The jitter may be observed as a deviation in the PWM Period, Duty Cycle or Phase, and may be affected independent of each other result, the maximum deviation exhibited on the PWM output pin at 30 MIPS is 8 ...

Page 7

... Module: ADC Module: Conversion Rate The data sheet indicates that the conversion rate for the ADC module is 2.0 Msps. The ADC module on the dsPIC30F1010/202X Rev. A2 silicon has a maximum conversion rate of 1.5 Msps. Work around None. 12. Module: ADC Module: Shared Sample ...

Page 8

... This operation needs to be performed when the transmit buffer is written. If FRMDLY = 0, no work around is needed. Note: The dsPIC30F1010/202X devices have only one SPI. All references are intended for software compatibility with other dsPIC DSC devices. © 2008 Microchip Technology Inc. ...

Page 9

... Master mode. In this mode, whether the SMP bit is set or cleared, the data is always sampled at the end of data output time. Note: The dsPIC30F1010/202X devices have only one SPI. All references are intended for software compatibility with other dsPIC DSC devices. Work around ...

Page 10

... The operation of this bit is the inverse of the stated operation dsPIC30F1010/202X Device (DS70178). The signal received from an IrDA transceiver can have an idle state of ‘1’ or ‘0’. The following table summarizes how UART receptions will occur when used with the IrDA decoder. ...

Page 11

... Write 2nd password mov.b w2, [w4] ; Write OSWEN bit return © 2008 Microchip Technology Inc. dsPIC30F1010/202X FIGURE 1: drops below DD +5V *Any commercially available BOR circuit can be used in this configuration. Refer to the BOR circuit manufacturer’s data sheet for exact circuit configuration. ...

Page 12

... Module: CPU – DAW.b instruction The Decimal Adjust instruction, DAW.b, may improperly clear the Carry bit, C (SR<0>), when executed. Work around Check the state of the Carry bit prior to executing the DAW.b instruction. If the Carry bit is set, set the Carry bit again after executing the DAW.b instruction ...

Page 13

... Note: The above work around is recommended for users for whom application hardware changes are not possible. © 2008 Microchip Technology Inc. dsPIC30F1010/202X ; Ensure flag is reset ; Return from Interrupt Service Routine Work around 3: Instead of executing a PWRSAV #0 instruction to put the device into Sleep mode, perform a clock switch to the 32 kHz Low-Power (LP) Oscillator with a 64:1 postscaler mode ...

Page 14

... Module: PWM Module The PWM module may not temperatures below -20ºC. During this condition the PWM module will relinquish control of the associated PWM pin and the Port I/O will determine the state of the pin. In addition, the PWM module will stop generating the ADC trigger before the module relinquishes control of the PWM pins ...

Page 15

... Work around None. © 2008 Microchip Technology Inc. dsPIC30F1010/202X 46. Module: Module: PSV Operations An address error trap occurs in certain addressing modes when accessing the first four bytes of an PSV page. This only occurs when using the addresses ...

Page 16

... APPENDIX A: REVISION HISTORY Revision A (6/2007) Initial release of this document. Revision B (8/2007) Updated issue 12 (ADC Module: Shared Sample and Hold Circuit). Added issue 34 (Sleep Mode). Revision C (5/2008) Summary items 5 and 6 were listed in the incorrect order and have been corrected. Updated silicon issue 5 (PWM Duty Cycle) and changed the title of silicon issue 6 (PWM Override Priority consistent with the summary title ...

Page 17

... PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 18

... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2008 Microchip Technology Inc. 01/02/08 ...

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