PIC16F84A-20/SO Microchip Technology, PIC16F84A-20/SO Datasheet - Page 490
![IC MCU FLASH 1KX14 EE 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC16F84A-20/SO
Manufacturer Part Number
PIC16F84A-20/SO
Description
IC MCU FLASH 1KX14 EE 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC16F84A-04P.pdf
(88 pages)
3.PIC16F84A-04P.pdf
(6 pages)
Specifications of PIC16F84A-20/SO
Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
68 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
18-SOIC (7.5mm Width)
Controller Family/series
PIC16F
No. Of I/o's
13
Eeprom Memory Size
64Byte
Ram Memory Size
68Byte
Cpu Speed
20MHz
No. Of Timers
1
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
68 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILI3-DB16F84A - BOARD DAUGHTER ICEPIC3309-1075 - ADAPTER 18-SOIC TO 18-SOIC309-1011 - ADAPTER 18-SOIC TO 18-DIP309-1010 - ADAPTER 18-SOIC TO 18-DIPAC164010 - MODULE SKT PROMATEII DIP/SOIC
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
26.3.1
26.3.2
DS31026A-page 26-6
Config. bits
OPTION_REG
Legend: Shaded cells are not used by the Watchdog Timer.
Name
WDT Period
WDT Programming Considerations
MPEEN
RBPU
Bit 7
The WDT has a nominal time-out period of 18 ms, (with no postscaler). The time-out period var-
ies with temperature, V
time-outs are desired, a postscaler with a division ratio of up to 1:128 can be assigned to the
WDT, under software control, by writing to the OPTION_REG register. Thus, time-out periods of
up to 2.3 seconds can be realized.
The
and prevent it from timing out and generating a device RESET.
The TO bit in the STATUS register will be cleared upon a Watchdog Timer time-out (WDT Reset
and WDT wake-up).
It should also be taken in account that under worst case conditions (V
ture = Maximum, maximum WDT postscaler) it may take several seconds before a WDT time-out
occurs.
Table 26-1: Summary of Watchdog Timer Registers
Note:
CLRWDT
INTEDG
BODEN
Bit 6
When the postscaler is assigned to the WDT, always execute a CLRWDT instruction
before changing the postscale value, otherwise a WDT reset may occur.
and
SLEEP
DD
instructions clear the WDT and the postscaler (if assigned to the WDT)
T0CS
Bit 5
CP1
and process variations from part to part (see DC specs). If longer
T0SE
Bit 4
CP0
PWRTE
Bit 3
PSA
WDTE
Bit 2
PS2
1997 Microchip Technology Inc.
DD
FOSC1
= Minimum, Tempera-
Bit 1
PS1
FOSC0
Bit 0
PS0
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