PIC16F84A-20/SO Microchip Technology, PIC16F84A-20/SO Datasheet - Page 592
![IC MCU FLASH 1KX14 EE 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC16F84A-20/SO
Manufacturer Part Number
PIC16F84A-20/SO
Description
IC MCU FLASH 1KX14 EE 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC16F84A-04P.pdf
(88 pages)
3.PIC16F84A-04P.pdf
(6 pages)
Specifications of PIC16F84A-20/SO
Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
68 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
18-SOIC (7.5mm Width)
Controller Family/series
PIC16F
No. Of I/o's
13
Eeprom Memory Size
64Byte
Ram Memory Size
68Byte
Cpu Speed
20MHz
No. Of Timers
1
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
68 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILI3-DB16F84A - BOARD DAUGHTER ICEPIC3309-1075 - ADAPTER 18-SOIC TO 18-SOIC309-1011 - ADAPTER 18-SOIC TO 18-DIP309-1010 - ADAPTER 18-SOIC TO 18-DIPAC164010 - MODULE SKT PROMATEII DIP/SOIC
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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PICmicro MID-RANGE MCU FAMILY
30.18
DS31030A-page 30-22
Param.
No.
62
63
64
65
66
† Data in “Typ” column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not
§
RD7:RD0
tested.
This specification ensured by design.
RE1/WR
RE0/RD
RE2/CS
Note: Refer to
TdtV2wrH
TwrH2dtI
TrdL2dtV
TrdH2dtI
TibfINH
Symbol
Example Parallel Slave Port (PSP) Timing Waveforms and Requirements
Figure 30-1
Data in valid before WR or CS
(setup time)
WR or CS to data–in invalid
(hold time)
RD and CS to data–out valid
RD or CS to data–out invalid
Inhibit of the IBF flag bit being cleared from
WR or CS
Figure 30-8:
Table 30-20:
for load conditions.
64
Example Parallel Slave Port Requirements
Characteristic
Example Parallel Slave Port Timing Waveforms
65
PIC16CXXX
PIC16LCXXX
Min
20
20
35
—
10
—
Typ†
—
—
—
—
—
—
62
3Tcy
1997 Microchip Technology Inc.
Max
63
80
30
—
—
—
§
Units Conditions
ns
ns
ns
ns
ns
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