DSPIC30F3010-20I/SP Microchip Technology, DSPIC30F3010-20I/SP Datasheet - Page 219

IC DSPIC MCU/DSP 24K 28DIP

DSPIC30F3010-20I/SP

Manufacturer Part Number
DSPIC30F3010-20I/SP
Description
IC DSPIC MCU/DSP 24K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F3010-20I/SP

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
20
Flash Memory Size
24KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC30F301020ISP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F3010-20I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Internet Address................................................................ 220
Interrupt Controller
Interrupt Priority
Interrupt Sequence ............................................................. 45
Interrupts ............................................................................. 41
L
Load Conditions ................................................................ 171
M
Memory Organization.......................................................... 23
Microchip Internet Web Site .............................................. 220
Modulo Addressing ............................................................. 36
Motor Control PWM Module................................................ 93
MPLAB ASM30 Assembler, Linker, Librarian ................... 160
MPLAB ICD 2 In-Circuit Debugger ................................... 161
MPLAB ICE 2000 High-Performance
MPLAB Integrated Development
MPLAB PM3 Device Programmer .................................... 161
MPLAB REAL ICE In-Circuit Emulator System................. 161
MPLINK Object Linker/MPLIB Object Librarian ................ 160
O
OCx/PWM Module Timing Characteristics........................ 183
Operating Current (I
Oscillator
Oscillator Configurations ................................................... 140
Oscillator Selection ........................................................... 137
Oscillator Start-up Timer
Output Compare Interrupts ................................................. 85
Output Compare Mode
Output Compare Module..................................................... 83
Output Compare Operation During
Output Compare Sleep Mode Operation ............................ 85
P
Packaging ......................................................................... 201
PICSTART Plus Development Programmer ..................... 162
© 2008 Microchip Technology Inc.
Register Map............................................................... 46
Traps........................................................................... 43
Interrupt Stack Frame ................................................. 45
Applicability ................................................................. 38
Operation Example ..................................................... 37
Start and End Address................................................ 37
W Address Register Selection .................................... 37
Fault Timing Characteristics ..................................... 184
Timing Characteristics .............................................. 184
Timing Requirements................................................ 184
Universal In-Circuit Emulator .................................... 161
Environment Software............................................... 159
Operating Modes (Table) .......................................... 138
Fail-Safe Clock Monitor............................................. 142
Fast RC (FRC) .......................................................... 141
Initial Clock Source Selection ................................... 140
Low-Power RC (LPRC)............................................. 141
LP Oscillator Control ................................................. 141
Phase Locked Loop (PLL) ........................................ 141
Start-up Timer (OST) ................................................ 140
Timing Characteristics .............................................. 177
Timing Requirements................................................ 177
Register Map............................................................... 86
Timing Characteristics .............................................. 182
Timing Requirements................................................ 182
CPU Idle Mode............................................................ 85
Details ....................................................................... 203
Marking ..................................................................... 201
DD
)..................................................... 165
Pinout Descriptions
PLL Clock Timing Specifications ...................................... 173
POR. See Power-on Reset.
Port Write/Read Example ................................................... 60
Position Measurement Mode .............................................. 89
Power-Down Current (I
Power-on Reset (POR)..................................................... 137
Power-Saving Modes........................................................ 147
Power-Saving Modes (Sleep and Idle) ............................. 137
Power-up Timer
Program Address Space..................................................... 23
Program and EEPROM Characteristics............................ 170
Program Counter ................................................................ 16
Program Data Table Access............................................... 26
Program Space Visibility
Programmable .................................................................. 137
Programmable Digital Noise Filters .................................... 89
Programmer’s Model .......................................................... 16
Programming Operations.................................................... 49
PWM
PWM Duty Cycle Comparison Units ................................... 97
PWM Fault Pins ................................................................ 101
PWM Operation During CPU Idle Mode ........................... 102
PWM Operation During CPU Sleep Mode........................ 102
PWM Output and Polarity Control..................................... 101
PWM Output Override ...................................................... 100
PWM Period........................................................................ 96
PWM Special Event Trigger.............................................. 102
dsPIC30F3010/3011
dsPIC30F3010............................................................ 12
dsPIC30F3011............................................................ 10
Oscillator Start-up Timer (OST)................................ 137
Power-up Timer (PWRT) .......................................... 137
Idle............................................................................ 148
Sleep ........................................................................ 147
Timing Characteristics .............................................. 177
Timing Requirements ............................................... 177
Construction ............................................................... 24
Data Access From Program Memory
Data Access from, Address Generation ..................... 24
Memory Map............................................................... 23
Table Instructions
Window into Program Space Operation ..................... 27
Diagram ...................................................................... 17
Algorithm for Program Flash....................................... 49
Erasing a Row of Program Memory ........................... 49
Initiating the Programming Sequence ........................ 50
Loading Write Latches ................................................ 50
Register Map ............................................................ 103
Duty Cycle Register Buffers ....................................... 97
Enable Bits ............................................................... 101
Fault States .............................................................. 101
Modes....................................................................... 101
Output Pin Control .................................................... 101
Complementary Output Mode .................................. 100
Synchronization ........................................................ 100
Postscaler................................................................. 102
Using Table Instructions ..................................... 25
TBLRDH ............................................................. 25
TBLRDL.............................................................. 25
TBLWTH............................................................. 25
TBLWTL ............................................................. 25
Cycle-by-Cycle ................................................. 101
Latched............................................................. 101
PD
)................................................ 167
DS70141E-page 217

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