DSPIC30F3010-20I/SP Microchip Technology, DSPIC30F3010-20I/SP Datasheet - Page 220

IC DSPIC MCU/DSP 24K 28DIP

DSPIC30F3010-20I/SP

Manufacturer Part Number
DSPIC30F3010-20I/SP
Description
IC DSPIC MCU/DSP 24K 28DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F3010-20I/SP

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
20
Flash Memory Size
24KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC30F301020ISP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F3010-20I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
dsPIC30F3010/3011
PWM Time Base ................................................................. 95
PWM Update Lockout ....................................................... 102
Q
QEA/QEB Input Characteristics ........................................ 185
QEI Module
Quadrature Decoder Timing Requirements ...................... 185
Quadrature Encoder Interface (QEI) Module ...................... 87
Quadrature Encoder Interface Interrupts ............................ 90
Quadrature Encoder Interface Logic ................................... 88
R
Reader Response ............................................................. 221
Reset......................................................................... 137, 143
Reset Sequence.................................................................. 43
Reset Timing Characteristics ............................................ 177
Reset Timing Requirements.............................................. 177
Resets
Revision History ................................................................ 213
S
Simple Capture Event Mode
Simple OCx/PWM Mode Timing Requirements ................ 183
Simple Output Compare Match Mode................................. 84
Simple PWM Mode ............................................................. 84
Single Pulse PWM Operation............................................ 100
Software Simulator (MPLAB SIM)..................................... 160
Software Stack Pointer, Frame Pointer............................... 16
SPI Mode
SPI Module........................................................................ 105
DS70141E-page 218
Continuous Up/Down Count Modes............................ 95
Double-Update Mode .................................................. 96
Free-Running Mode .................................................... 95
Postscaler ................................................................... 96
Prescaler ..................................................................... 96
Single-Shot Mode ....................................................... 95
External Clock Timing Requirements........................ 181
Index Pulse Timing Characteristics........................... 186
Index Pulse Timing Requirements ............................ 186
Operation During CPU Idle Mode ............................... 90
Operation During CPU Sleep Mode ............................ 89
Register Map............................................................... 91
Timer Operation During CPU Idle Mode ..................... 90
Timer Operation During CPU Sleep Mode.................. 89
Reset Sources ............................................................ 43
BOR, Programmable................................................. 145
POR .......................................................................... 143
POR with Long Crystal Start-up Time ....................... 145
POR, Operating without FSCM and PWRT .............. 145
Capture Buffer Operation ............................................ 80
Capture Prescaler ....................................................... 80
Hall Sensor Mode ....................................................... 80
Input Capture in CPU Idle Mode ................................. 81
Timer2 and Timer3 Selection Mode ............................ 80
Input Pin Fault Protection............................................ 84
Period.......................................................................... 85
CALL Stack Frame...................................................... 31
Slave Select Synchronization ................................... 107
SPI1 Register Map .................................................... 108
Framed SPI Support ................................................. 106
Operating Function Description ................................ 105
SDOx Disable ........................................................... 105
Timing Characteristics
Master Mode (CKE = 0) .................................... 187
Master Mode (CKE = 1) .................................... 188
Slave Mode (CKE = 1) .............................. 189, 190
SPI Operation During CPU Idle Mode .............................. 107
SPI Operation During CPU Sleep Mode........................... 107
STATUS Register ............................................................... 16
Symbols Used in Opcode Descriptions ............................ 152
System Integration............................................................ 137
T
Temperature and Voltage Specifications
Timer1 Module.................................................................... 65
Timer2 and Timer3 Selection Mode.................................... 84
Timer2/3 Module................................................................. 69
Timer4/5 Module................................................................. 75
TimerQ (QEI Module) External Clock
Timing Characteristics
Timing Diagrams
Timing Requirements
Word and Byte Communication ................................ 105
Overview................................................................... 137
Register Map ............................................................ 150
AC............................................................................. 171
DC ............................................................................ 163
16-Bit Asynchronous Counter Mode........................... 65
16-Bit Synchronous Counter Mode............................. 65
16-Bit Timer Mode ...................................................... 65
Gate Operation ........................................................... 66
Interrupt ...................................................................... 67
Operation During Sleep Mode .................................... 66
Prescaler .................................................................... 66
Real-Time Clock ......................................................... 67
Register Map .............................................................. 68
32-Bit Synchronous Counter Mode............................. 69
32-Bit Timer Mode ...................................................... 69
ADC Event Trigger...................................................... 72
Gate Operation ........................................................... 72
Interrupt ...................................................................... 72
Operation During Sleep Mode .................................... 72
Register Map .............................................................. 73
Timer Prescaler .......................................................... 72
Register Map .............................................................. 78
Timing Characteristics .............................................. 181
SPI Module
A/D Conversion
ADC Conversion
Band Gap Start-up Time........................................... 178
Center Aligned PWM .................................................. 97
CLKOUT and I/O ...................................................... 176
Dead Time .................................................................. 99
Edge-Aligned PWM .................................................... 97
External Clock........................................................... 171
I
2
C Bus Data
Master Mode (CKE = 0).................................... 187
Master Mode (CKE = 1).................................... 188
Slave Mode (CKE = 0)...................................... 189
Slave Mode (CKE = 1)...................................... 191
RTC Interrupts .................................................... 67
RTC Oscillator Operation ................................... 67
Slave Mode (CKE = 0)...................................... 189
10-Bit High-speed (CHPS = 01,
10-Bit High-speed (CHPS = 01,
Master Mode..................................................... 192
Slave Mode....................................................... 194
SIMSAM = 0, ASAM = 1, SSRC = 111,
SAMC = 00001)........................................ 199
SIMSAM = 0, ASAM = 0,
SSRC = 000) ............................................ 198
© 2008 Microchip Technology Inc.

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