PIC24HJ64GP502-I/MM Microchip Technology, PIC24HJ64GP502-I/MM Datasheet - Page 2

• Manufacturer Part Number: PIC24HJ64GP502-I/MM
• Description: IC PIC MCU FLASH 64K 28-QFN
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ64GP502-I/MM

• Program Memory Type: FLASH
• Program Memory Size: 64KB (22K x 24)
• Package / Case: 28-QFN
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24HJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM300027
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 10 Channel / 12 bit, 10 Channel
• Controller Family/series: PIC24
• No. Of I/o's: 21
• Ram Memory Size: 4KB
• Cpu Speed: 40MIPS
• No. Of Timers: 7
• Embedded Interface Type: CAN, I2C, SPI, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 1:
TABLE 2:
DS80441F-page 2
PIC24HJ128GP202
PIC24HJ128GP204
PIC24HJ128GP502
PIC24HJ128GP504
Note 1:
Note 1:
Module
UART
UART
UART
I
SPI
2
SPI
I
I
I
I
I
C™
2
2
2
2
2
2:
C
C
C
C
C
The Device and Revision IDs (DEVID and DEVREV) are located at the last two implemented addresses in
program memory.
Refer to the “dsPIC33F/PIC24H Flash Programming Specification” (DS70152) for detailed information on
Device and Revision IDs for your specific device.
Only those issues indicated in the last column apply to the current silicon revision.
Part Number
Frame Mode
High-Speed
SFR Writes
Addressing
Addressing
Addressing
SILICON DEVREV VALUES (CONTINUED)
SILICON ISSUE SUMMARY
Operation
Interrupts
IR Mode
Transmit
Feature
Mode
10-bit
10-bit
10-bit
—
—
Number
Item
10.
11.
1.
2.
3.
4.
5.
6.
7.
8.
9.
The 16x baud clock signal on the BCLK pin is present
only when the module is transmitting.
When the UART is in 4x mode (BRGH = 1) and using two
Stop bits (STSEL = 1), it may sample the first Stop bit
instead of the second one.
The SPI Transmit Buffer Full (SPITBF) flag does not get
set immediately after writing to the buffer.
The SPI module will generate incorrect frame synchroni-
zation pulses in Frame Master mode if FRMDLY = 1.
The BCL bit in I2CSTAT can only be cleared with Word
instructions, and can be corrupted with byte instructions
and bit operations.
When the I
using the same address bits (A10 and A9) as other I
devices, A10 and A9 bits may not work as expected.
When the I
an address of 0x102, the I2CxRCV register content for
the lower address byte is 0x01 rather than 0x02.
With the I
Interrupt Input functions (if any) associated with SCL and
SDA pins will not reflect the actual digital logic levels on
the pins.
The 10-bit slave does not set the RBF flag or load the
I2CxRCV register, on address match if the Least Signifi-
cant bits (LSbs) of the address are the same as the 7-bit
reserved addresses.
After the ACKSTAT bit is set when receiving a NACK, it
may be cleared by the reception of a Start or Stop bit.
The UART error interrupt may not occur, or may occur at
an incorrect time, if multiple errors occur during a short
period of time.
2
C module enabled, the PORT bits and external
2
2
Device ID
C module is configured for 10-bit addressing
C module is configured as a 10-bit slave with
0x067D
0x067F
0x0665
0x0667
Issue Summary
(1)
0x3001
Revision ID for Silicon Revision
A1
© 2010 Microchip Technology Inc.
0x3002
A2
2
C
0x3002
A1 A2 A3 A4
X
X
X
X
X
X
X
X
X
X
X
A3
Revisions
Affected
X
X
X
X
X
X
X
X
X
X
X
0x3003
X
X
X
X
X
X
X
X
X
X
X
A4
(1)
(2)
X
X
X
X
X
X
X
X
X
X
X