PIC18F4431-I/P Microchip Technology, PIC18F4431-I/P Datasheet - Page 125
![IC PIC MCU FLASH 8KX16 40DIP](/photos/6/61/66192/150-40-dip_sml.jpg)
PIC18F4431-I/P
Manufacturer Part Number
PIC18F4431-I/P
Description
IC PIC MCU FLASH 8KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC18F2331-ISO.pdf
(392 pages)
4.PIC18F2331-ISO.pdf
(8 pages)
5.PIC18F2331-ISO.pdf
(6 pages)
6.PIC18F2331-ISO.pdf
(16 pages)
7.PIC18LF2331-ISO.pdf
(40 pages)
8.PIC18F2431-ISP.pdf
(396 pages)
Specifications of PIC18F4431-I/P
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART/I2C/SPI/SSP
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Package
40PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F4431-I/P
Manufacturer:
ABB
Quantity:
240
Company:
Part Number:
PIC18F4431-I/P
Manufacturer:
MICROCHIP
Quantity:
769
Part Number:
PIC18F4431-I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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Manufacturer:
MICROCHIP
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Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
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Manufacturer:
MICROCHI
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC18F2331-ISO PDF datasheet #3
- PIC18F2331-ISO PDF datasheet #4
- PIC18F2331-ISO PDF datasheet #5
- PIC18F2331-ISO PDF datasheet #6
- PIC18LF2331-ISO PDF datasheet #7
- PIC18F2431-ISP PDF datasheet #8
- Current page: 125 of 392
- Download datasheet (4Mb)
TABLE 11-9:
TABLE 11-10: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
2010 Microchip Technology Inc.
PORTE
LATE
TRISE
ANSEL0
ANSEL1
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTE.
Note 1:
RE0/AN6
RE1/AN7
RE2/AN8
MCLR/V
Legend:
Note 1:
Name
2:
2:
Pin
PP
/RE3
Implemented only when Master Clear functionality is disabled (CONFIG3H<7> = 0). It is available for
PIC18F4331/4431 devices only.
ANS5 through ANS8 are available only on PIC18F4331/4431 devices.
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level input/output;
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
All PORTE pins are only implemented on 40/44-pin devices.
RE3 does not have a corresponding TRIS bit to control data direction.
ANS7
(1)
Bit 7
—
—
—
—
PORTE I/O SUMMARY
Function
(2)
MCLR
RE0
AN6
RE1
AN7
RE2
AN8
RE3
V
PP
ANS6
Bit 6
—
—
—
—
Setting
(2)
TRIS
—
—
—
0
1
1
0
1
1
0
1
1
(2)
ANS5
Bit 5
—
—
—
—
I/O
O
O
O
(2)
I
I
I
I
I
I
I
I
I
PIC18F2331/2431/4331/4431
ANS4
Type
ANA
ANA
ANA
ANA
Bit 4
DIG
DIG
DIG
I/O
ST
ST
ST
ST
ST
—
—
—
—
LATE<0> data output; not affected by analog input.
PORTE<0> data input; disabled when analog input is enabled.
A/D Input Channel 6. Default input configuration on POR.
LATE<1> data output; not affected by analog input.
PORTE<1> data input; disabled when analog input is enabled.
A/D Input Channel 7. Default input configuration on POR.
LATE<2> data output; not affected by analog input.
PORTE<2> data input; disabled when analog input is enabled.
A/D Input Channel 8. Default input configuration on POR.
External Master Clear input; enabled when MCLRE Configuration bit
is set.
High-Voltage Detection; used for ICSP™ mode entry detection. Always
available, regardless of pin mode.
PORTE<3> data input; enabled when MCLRE Configuration bit is
clear.
RE3
ANS3
Bit 3
—
—
—
(1)
LATE Data Output Register
PORTE Data Direction Register
ANS2
Bit 2
RE2
—
Description
ANS1
Bit 1
RE1
—
ANS8
ANS0
Bit 0
RE0
(2)
DS39616D-page 125
Reset Values
on Page:
57
57
57
56
56
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