ATMEGA162-16PU Atmel, ATMEGA162-16PU Datasheet - Page 274

• Manufacturer Part Number: ATMEGA162-16PU
• Description: IC AVR MCU 16K 16MHZ 5V 40DIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA162-16PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: ATMEGA16x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: JTAG/SPI/USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• Cpu Speed: 16 MIPS
• Eeprom Memory: 512 Bytes
• Input Output: 35
• Interface: JTAG/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 44-pin PDIP
• Programmable Memory: 16K Bytes
• Timers: 2-8-bit, 2-16-bit
• Voltage, Range: 2.7-5.5 V
• Package: 40PDIP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 16 MHz
• For Use With: ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

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ATmega162/V
Figure 120. External Memory Timing (SRWn1 = 1, SRWn0 = 0)
Figure 121. External Memory Timing (SRWn1 = 1, SRWn0 = 1)
Note:
System Clock (CLK
System Clock (CLK
DA7:0 (XMBK = 0)
DA7:0 (XMBK = 0)
1. The ALE pulse in the last period (T4 - T7) is only present if the next instruction accesses the
RAM (internal or external).
DA7:0
A15:8
CPU
ALE
DA7:0
WR
A15:8
RD
CPU
ALE
WR
)
RD
)
Prev. addr.
Prev. data
Prev. addr.
Prev. data
T1
T1
1
Address
Address
4
2
1
5
T2
6
Address
Address
3a
3b
4
2
XX
7
8
5
T2
6
13
3a
3b
XX
10
7
8
13
T3
10
T3
Data
Address
12
Data
16
15
T4
9
Data
Address
12
Data
16
15
T4
9
T5
(1)
11
T5
T6
11
14
T6
14
T7
2513K–AVR–07/09