DSPIC30F4013-20I/PT Microchip Technology, DSPIC30F4013-20I/PT Datasheet - Page 221

• Manufacturer Part Number: DSPIC30F4013-20I/PT
• Description: IC DSPIC MCU/DSP 48K 44TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4013-20I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
• Number Of I /o: 30
• Program Memory Size: 48KB (16K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 30
• Flash Memory Size: 48KB
• Supply Voltage Range: 2.5V To 5.5V
• Package: 44TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 30
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 13-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC30F006 - MODULE SKT FOR DSPIC30F 44TQFPAC164305 - MODULE SKT FOR PM3 44TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F401320IPT

Timer2/3 Module ................................................................. 71
Timer4/5 Module ................................................................. 77
Timing Diagrams
Timing Diagrams and Specifications
Timing Diagrams.See Timing Characteristics
Timing Requirements
© 2008 Microchip Technology Inc.
16-Bit Timer Mode ...................................................... 71
32-Bit Synchronous Counter Mode............................. 71
32-Bit Timer Mode ...................................................... 71
ADC Event Trigger...................................................... 74
Gate Operation ........................................................... 74
Interrupt....................................................................... 74
Operation During Sleep Mode .................................... 74
Register Map............................................................... 75
Timer Prescaler........................................................... 74
Register Map............................................................... 79
A/D Conversion
Band Gap Start-up Time ........................................... 184
Brown-out Reset Characteristics .............................. 176
CAN Bit ..................................................................... 114
CAN Module I/O........................................................ 202
CLKOUT and I/O....................................................... 182
DCI Module
External Clock........................................................... 178
Frame Sync, AC-Link Start-Of-Frame....................... 122
Frame Sync, Multichannel Mode .............................. 122
I
I
I
Input Capture (CAPx)................................................ 187
Low-Voltage Detect................................................... 175
OCx/PWM Module .................................................... 188
Oscillator Start-up Timer ........................................... 183
Output Compare Module........................................... 187
Power-up Timer ........................................................ 183
PWM Output ............................................................... 87
Reset......................................................................... 183
SPI Module
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Type A, B and C Timer External Clock ..................... 185
Watchdog Timer........................................................ 183
DC Characteristics - Internal RC Accuracy............... 180
A/D Conversion
Band Gap Start-up Time ........................................... 184
Brown-out Reset ....................................................... 184
CAN Module I/O........................................................ 202
CLKOUT and I/O....................................................... 182
DCI Module
2
2
2
C Bus Data
C Bus Start/Stop Bits
S Interface Frame Sync.......................................... 122
Low-Speed (ASAM = 0, SSRC = 000) .............. 205
AC-Link Mode ................................................... 191
Multichannel, I
Master Mode ..................................................... 198
Slave Mode ....................................................... 200
Master Mode ..................................................... 198
Slave Mode ....................................................... 200
Master Mode (CKE = 0) .................................... 192
Master Mode (CKE = 1) .................................... 193
Slave Mode (CKE = 0) ...................................... 195
Slave Mode (CKE = 1) ...................................... 196
(MCLR Not Tied to V
(MCLR Not Tied to V
(MCLR Tied to V
Low-Speed........................................................ 206
2
S Modes ................................... 189
DD
).......................................... 150
DD
DD
), Case 1...................... 150
), Case 2...................... 150
Trap Vectors ....................................................................... 63
U
UART Module
UART Operation
Unit ID Locations .............................................................. 139
Universal Asynchronous Receiver Transmitter
W
Wake-up from Sleep ......................................................... 139
Wake-up from Sleep and Idle ............................................. 64
Watchdog Timer
Watchdog Timer (WDT)............................................ 139, 153
WWW Address ................................................................. 220
WWW, On-Line Support ....................................................... 8
dsPIC30F3014/4013
External Clock .......................................................... 179
I
I
Input Capture............................................................ 187
Oscillator Start-up Timer........................................... 184
Output Compare Module .......................................... 187
Power-up Timer ........................................................ 184
Reset ........................................................................ 184
Simple OCx/PWM Mode........................................... 188
SPI Module
Type A Timer External Clock .................................... 185
Type B Timer External Clock .................................... 186
Type C Timer External Clock.................................... 186
Watchdog Timer ....................................................... 184
Address Detect Mode ............................................... 105
Auto-Baud Support ................................................... 106
Baud Rate Generator ............................................... 105
Enabling and Setting Up........................................... 103
Framing Error (FERR) .............................................. 105
Idle Status................................................................. 105
Loopback Mode ........................................................ 105
Operation During CPU Sleep and Idle Modes.......... 106
Overview................................................................... 101
Parity Error (PERR) .................................................. 105
Receive Break .......................................................... 105
Receive Buffer (UxRXB)........................................... 104
Receive Buffer Overrun Error (OERR Bit) ................ 104
Receive Interrupt ...................................................... 104
Receiving Data ......................................................... 104
Receiving in 8-Bit or 9-Bit Data Mode ...................... 104
Reception Error Handling ......................................... 104
Transmit Break ......................................................... 104
Transmit Buffer (UxTXB) .......................................... 103
Transmit Interrupt ..................................................... 104
Transmitting Data ..................................................... 103
Transmitting in 8-Bit Data Mode ............................... 103
Transmitting in 9-Bit Data Mode ............................... 103
UART1 Register Map ............................................... 107
UART2 Register Map ............................................... 107
Idle Mode.................................................................. 106
Sleep Mode .............................................................. 106
(UART) Module......................................................... 101
Timing Requirements ............................................... 184
Enabling and Disabling............................................. 153
Operation.................................................................. 153
2
2
C Bus Data (Master Mode) .................................... 198
C Bus Data (Slave Mode) ...................................... 201
AC-Link Mode................................................... 192
Multichannel, I
Master Mode (CKE = 0).................................... 193
Master Mode (CKE = 1).................................... 194
Slave Mode (CKE = 0)...................................... 195
Slave Mode (CKE = 1)...................................... 197
2
S Modes................................... 190
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