DSPIC30F4011-30I/ML Microchip Technology, DSPIC30F4011-30I/ML Datasheet - Page 65
DSPIC30F4011-30I/ML
Manufacturer Part Number
DSPIC30F4011-30I/ML
Description
IC DSPIC MCU/DSP 48K 44QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F4012-30ISO.pdf
(238 pages)
2.DSPIC30F4012-30ISO.pdf
(18 pages)
3.DSPIC30F4012-30ISO.pdf
(6 pages)
4.DSPIC30F4012-30ISO.pdf
(16 pages)
5.DSPIC30F4012-30ISO.pdf
(22 pages)
Specifications of DSPIC30F4011-30I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
48KB (16K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
30
Flash Memory Size
48KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F401130IML
- DSPIC30F4012-30ISO PDF datasheet
- DSPIC30F4012-30ISO PDF datasheet #2
- DSPIC30F4012-30ISO PDF datasheet #3
- DSPIC30F4012-30ISO PDF datasheet #4
- DSPIC30F4012-30ISO PDF datasheet #5
- Current page: 65 of 238
- Download datasheet (4Mb)
8.3
The input change notification module provides the
dsPIC30F devices the ability to generate interrupt
requests to the processor in response to a change of
state on selected input pins. This module is capable of
detecting input change of states, even in Sleep mode,
when the clocks are disabled. There are 10 external
signals (CN0 through CN7, CN17 and CN18) that may
be selected (enabled) for generating an interrupt
request on a change of state.
Please refer to the pin diagrams for CN pin locations.
TABLE 8-3:
© 2010 Microchip Technology Inc.
CNEN1
CNEN2
CNPU1
CNPU2
Legend:
Note
SFR Name
1:
2:
Input Change Notification Module
u = uninitialized bit; — = unimplemented bit, read as ‘0’
Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
These bits are not available on dsPIC30F4012 devices.
Addr.
00C0
00C2
00C4
00C6
INPUT CHANGE NOTIFICATION REGISTER MAP (BITS 7-0)
CN7PUE
CN7IE
Bit 7
—
—
CN6PUE
CN6IE
Bit 6
—
—
CN5PUE
CN5IE
Bit 5
—
—
CN4PUE
CN4IE
Bit 4
—
—
CN3PUE
CN3IE
Bit 3
—
—
CN18PUE
CN18IE
CN2PUE
dsPIC30F4011/4012
CN2IE
Bit 2
(2)
(2)
CN17PUE
CN17IE
CN1PUE
CN1IE
Bit 1
(2)
(2)
(1)
CN0PUE
CN0IE
Bit 0
—
—
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
DS70135G-page 65
Reset State
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