PIC18LF2610-I/SP Microchip Technology, PIC18LF2610-I/SP Datasheet - Page 111
![IC MCU FLASH 32KX16 28SDIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18LF2610-I/SP
Manufacturer Part Number
PIC18LF2610-I/SP
Description
IC MCU FLASH 32KX16 28SDIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18LF2410-ISO.pdf
(376 pages)
3.PIC18LF2410-ISO.pdf
(8 pages)
4.PIC18F2515-ISO.pdf
(16 pages)
5.PIC18F2515-ISO.pdf
(6 pages)
6.PIC18F2515-ISO.pdf
(8 pages)
Specifications of PIC18LF2610-I/SP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3968 B
Interface Type
CCP, ECCP, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
25
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Data Rom Size
3968 B
Height
3.3 mm
Length
34.67 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
7.24 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
- PIC18F2221-ISO PDF datasheet
- PIC18LF2410-ISO PDF datasheet #2
- PIC18LF2410-ISO PDF datasheet #3
- PIC18F2515-ISO PDF datasheet #4
- PIC18F2515-ISO PDF datasheet #5
- PIC18F2515-ISO PDF datasheet #6
- Current page: 111 of 376
- Download datasheet (7Mb)
FIGURE 9-3:
FIGURE 9-4:
TABLE 9-11:
© 2009 Microchip Technology Inc.
PORTD
LATD
TRISD
PORTE
LATE
TRISE
INTCON
PIR1
PIE1
IPR1
ADCON1
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Parallel Slave Port.
Note 1:
Name
PORTD<7:0>
PORTD<7:0>
PSPIF
These bits are unimplemented on 28-pin devices and read as ‘0’.
PSPIF
PORTD Data Latch Register (Read and Write to Data Latch)
PORTD Data Direction Control Register
GIE/GIEH PEIE/GIEL
OBF
OBF
PSPIF
PSPIE
PSPIP
CS
WR
RD
IBF
CS
WR
RD
IBF
Bit 7
RD7
IBF
—
—
—
REGISTERS ASSOCIATED WITH PARALLEL SLAVE PORT
(1)
(1)
(1)
PARALLEL SLAVE PORT WRITE WAVEFORMS
PARALLEL SLAVE PORT READ WAVEFORMS
Q1
Q1
ADIF
ADIE
ADIP
Bit 6
RD6
OBF
—
—
—
Q2
Q2
TMR0IF
VCFG1
IBOV
RCIE
RCIP
RCIF
Bit 5
RD5
Q3
Q3
—
—
Q4
Q4
PSPMODE
VCFG0
INT0IE
TXIE
TXIP
Bit 4
TXIF
RD4
—
—
Q1
Q1
PCFG3
Q2
SSPIF
SSPIE
SSPIP
Q2
RBIE
Bit 3
RD3
RE3
—
—
PIC18F2X1X/4X1X
Q3
Q3
LATE Data Output bits
TMR0IF
CCP1IF
CCP1IE
CCP1IP
TRISE2
PCFG2
Bit 2
RD2
RE2
Q4
Q4
TMR2IE
TMR2IP
TMR2IF
TRISE1
PCFG1
Q1
INT0IF
Q1
Bit 1
RD1
RE1
Q2
Q2
TMR1IF
TMR1IE
TMR1IP
TRISE0
PCFG0
RBIF
DS39636D-page 113
Bit 0
RD0
RE0
Q3
Q3
on page
Values
Q4
Reset
Q4
54
54
54
54
54
54
51
53
54
54
54
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