PIC24HJ64GP510-I/PF Microchip Technology, PIC24HJ64GP510-I/PF Datasheet - Page 201

• Manufacturer Part Number: PIC24HJ64GP510-I/PF
• Description: IC PIC MCU FLASH 32KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ64GP510-I/PF

• Core Size: 16-Bit
• Program Memory Size: 64KB (22K x 24)
• Core Processor: PIC
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Controller Family/series: PIC24
• No. Of I/o's: 85
• Ram Memory Size: 8KB
• Cpu Speed: 40MIPS
• No. Of Timers: 13
• No. Of Pwm Channels: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARDDM300024 - KIT DEMO DSPICDEM 1.1MA240012 - MODULE PLUG-IN PIC24H 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164323 - MODULE SKT FOR 100TQFP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REGISTER 19-29: CiTRBnDLC: ECAN™ MODULE BUFFER n DATA LENGTH CONTROL
REGISTER 19-30: CiTRBnDm: ECAN™ MODULE BUFFER n DATA FIELD BYTE m
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-10
bit 9
bit 8
bit 7-5
bit 4
bit 3-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
TRBnDm7
Note 1: The Most Significant Byte contains byte (m + 1) of the buffer.
R/W-x
R/W-x
EID5
U-0
—
EID<5:0>: Extended Identifier bits
RTR: Remote Transmission Request bit
1 = Message will request remote transmission
0 = Normal message
RB1: Reserved Bit 1
User must set this bit to ‘0’ per CAN protocol.
Unimplemented: Read as ‘0’
RB0: Reserved Bit 0
User must set this bit to ‘0’ per CAN protocol.
DLC<3:0>: Data Length Code bits
TRnDm<7:0>: Data Field Buffer ‘n’ Byte ‘m’ bits
TRBnDm6
R/W-x
R/W-x
EID4
U-0
—
(n = 0, 1, ..., 31)
(n = 0, 1, ..., 31; m = 0, 1, ..., 7)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
TRBnDm5
R/W-x
R/W-x
EID3
U-0
—
PIC24HJXXXGPX06/X08/X10
TRBnDm4
R/W-x
R/W-x
R/W-x
EID2
RB0
(1)
‘0’ = Bit is cleared
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
TRBnDm3
R/W-x
R/W-x
R/W-x
DLC3
EID1
TRBnDm2
R/W-x
R/W-x
R/W-x
DLC2
EID0
x = Bit is unknown
x = Bit is unknown
TRBnDm1
R/W-x
R/W-x
R/W-x
DLC1
RTR
DS70175H-page 199
TRBnDm0
R/W-x
R/W-x
R/W-x
DLC0
RB1
bit 8
bit 0
bit 0