PIC24HJ64GP510-I/PF Microchip Technology, PIC24HJ64GP510-I/PF Datasheet - Page 279

• Manufacturer Part Number: PIC24HJ64GP510-I/PF
• Description: IC PIC MCU FLASH 32KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ64GP510-I/PF

• Core Size: 16-Bit
• Program Memory Size: 64KB (22K x 24)
• Core Processor: PIC
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Controller Family/series: PIC24
• No. Of I/o's: 85
• Ram Memory Size: 8KB
• Cpu Speed: 40MIPS
• No. Of Timers: 13
• No. Of Pwm Channels: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARDDM300024 - KIT DEMO DSPICDEM 1.1MA240012 - MODULE PLUG-IN PIC24H 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164323 - MODULE SKT FOR 100TQFP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

APPENDIX A:
Revision A (February 2006)
• Initial release of this document
Revision B (March 2006)
• Updated the Configuration Bits Description table
• Updated registers and register maps
• Updated Section 15.0 “Serial Peripheral Interface
• Updated Section 23.0 “Electrical Characteristics”
• Updated pinout diagrams
• Additional minor corrections throughout document
Revision C (May 2006)
• Updated Section 23.0 “Electrical Characteristics”
• Updated the Configuration Bits Description table
• Additional minor corrections throughout document
© 2009 Microchip Technology Inc.
(Table 20-1)
(SPI)”
text
(Table 20-1)
text
REVISION HISTORY
PIC24HJXXXGPX06/X08/X10
Revision D (July 2006)
• Added FBS and FSS Device Configuration regis-
• Added INTTREG Interrupt Control and Status
• Added Core Registers BSRAM and SSRAM (see
• Clarified Fail-Safe Clock Monitor operation (see
• Updated COSC<2:0> and NOSC<2:0> bit config-
• Updated CLKDIV register bit configurations (see
• Added Word Write Cycle Time parameter (T
• Noted exceptions to Absolute Maximum Ratings
• Added ADC2 Event Trigger for Timer4/5
• Corrected mislabeled I2COV bit in I2CxSTAT
• Removed AD26a, AD27a, AD28a, AD26b, AD27b
• Revised Table 23-36 (AD63)
Revision F (June 2007)
• Changed document name from PIC24H Family Data
• Updated Section 23.0 “Electrical Characteristics”
• Additional minor corrections throughout document
ters (see Table 20-1) and corresponding bit field
descriptions (see Table 20-2). These added regis-
ters replaced the former RESERVED1 and
RESERVED2 registers.
register. (See Section 6.3 “Interrupt Control
and Status Registers”. See also Register 6-33.)
Section 3.2.7 “Data Ram Protection Feature”)
Section 8.3 “Fail-Safe Clock Monitor (FSCM)”)
urations in OSCCON register (see Register 8-1)
Register 8-2)
to Program Flash Memory (see Table 23-12)
on I/O pin output current (see Section 23.0
“Electrical Characteristics”)
(Section 12.0 “Timer2/3, Timer4/5, Timer6/7
and Timer8/9”)
register (see Register 16-2)
and AD28b from Table 23-34 (ADC Module)
Sheet to PIC24HJXXXGPX06/X08/X10 Data Sheet,
which resulted in revision change from E to F prior to
publication.
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DS70175H-page 277
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