ATMEGA32-16PU Atmel, ATMEGA32-16PU Datasheet

IC AVR MCU 32K 16MHZ 5V 40DIP

ATMEGA32-16PU

Manufacturer Part Number
ATMEGA32-16PU
Description
IC AVR MCU 32K 16MHZ 5V 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA32-16PU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
16 MIPS
Eeprom Memory
1K Bytes
Input Output
32
Interface
2-Wire/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
32K Bytes
Timers
2-8-bit, 1-16-bit
Voltage, Range
4.5-5.5 V
Data Rom Size
1024 B
Height
4.83 mm
Length
52.58 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Width
13.97 mm
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
1024Byte
Ram Memory Size
2KB
Rohs Compliant
Yes
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA32-16PU
Manufacturer:
ATMEL
Quantity:
62
Features
High-performance, Low-power Atmel
Advanced RISC Architecture
High Endurance Non-volatile Memory segments
JTAG (IEEE std. 1149.1 Compliant) Interface
Peripheral Features
Special Microcontroller Features
I/O and Packages
Operating Voltages
Speed Grades
Power Consumption at 1 MHz, 3V, 25⋅C
– 131 Powerful Instructions – Most Single-clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16 MHz
– On-chip 2-cycle Multiplier
– 32Kbytes of In-System Self-programmable Flash program memory
– 1024Bytes EEPROM
– 2Kbyte Internal SRAM
– Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C
– Optional Boot Code Section with Independent Lock Bits
– Programming Lock for Software Security
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
– Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture
– Real Time Counter with Separate Oscillator
– Four PWM Channels
– 8-channel, 10-bit ADC
– Byte-oriented Two-wire Serial Interface
– Programmable Serial USART
– Master/Slave SPI Serial Interface
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated RC Oscillator
– External and Internal Interrupt Sources
– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby
– 32 Programmable I/O Lines
– 40-pin PDIP, 44-lead TQFP, and 44-pad QFN/MLF
– 2.7V - 5.5V for ATmega32L
– 4.5V - 5.5V for ATmega32
– 0 - 8MHz for ATmega32L
– 0 - 16MHz for ATmega32
– Active: 1.1mA
– Idle Mode: 0.35mA
– Power-down Mode: < 1µA
True Read-While-Write Operation
Mode
and Extended Standby
In-System Programming by On-chip Boot Program
8 Single-ended Channels
7 Differential Channels in TQFP Package Only
2 Differential Channels with Programmable Gain at 1x, 10x, or 200x
®
AVR
®
8-bit Microcontroller
(1)
8-bit
Microcontroller
with 32KBytes
In-System
Programmable
Flash
ATmega32
ATmega32L
Summary
2503QS–AVR–02/11

Related parts for ATMEGA32-16PU

ATMEGA32-16PU Summary of contents

Page 1

... Operating Voltages – 2.7V - 5.5V for ATmega32L – 4.5V - 5.5V for ATmega32 • Speed Grades – 8MHz for ATmega32L – 16MHz for ATmega32 • Power Consumption at 1 MHz, 3V, 25⋅C – Active: 1.1mA – Idle Mode: 0.35mA – Power-down Mode: < 1µA ® ...

Page 2

... Pin Configurations Figure 1. Pinout ATmega32 2503QS–AVR–02/11 PDIP (XCK/T0) PB0 (T1) PB1 (INT2/AIN0) PB2 (OC0/AIN1) PB3 (SS) PB4 (MOSI) PB5 (MISO) PB6 (SCK) PB7 RESET VCC GND XTAL2 XTAL1 (RXD) PD0 (TXD) PD1 (INT0) PD2 (INT1) PD3 (OC1B) PD4 (OC1A) PD5 (ICP1) PD6 ...

Page 3

... Overview The Atmel enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega32 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. Block Diagram Figure 2. Block Diagram VCC GND AVCC AREF 2503QS–AVR–02/11 ® ...

Page 4

... Atmel ATmega32 is a powerful microcontroller that provides a highly-flexible and cost-effec- tive solution to many embedded control applications. The Atmel AVR ATmega32 is supported with a full suite of program and system development tools including: C compilers, macro assemblers, program debugger/simulators, in-circuit emula- tors, and evaluation kits. ...

Page 5

... As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port B also serves the functions of various special features of the ATmega32 as listed on 57. Port C (PC7..PC0) Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit) ...

Page 6

... These code examples assume that the part specific header file is included before Examples compilation. Be aware that not all C Compiler vendors include bit definitions in the header files and interrupt handling compiler dependent. Please confirm with the C Compiler documen- tation for more details. 2503QS–AVR–02/11 1. ATmega32(L) 6 ...

Page 7

... UDRE FE DOR TXCIE UDRIE RXEN TXEN ACBG ACO ACI ACIE REFS0 ADLAR MUX4 MUX3 ADSC ADATE ADIF ADIE TWA5 TWA4 TWA3 TWA2 ATmega32(L) Bit 2 Bit 1 Bit SP10 SP9 SP8 SP2 SP1 SP0 – – IVSEL IVCE – – – – TOIE1 ...

Page 8

... I/O Register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions work with registers $00 to $1F only. 2503QS–AVR–02/11 Bit 6 Bit 5 Bit 4 Bit 3 TWS6 TWS5 TWS4 TWS3 ATmega32(L) Bit 2 Bit 1 Bit 0 TWPS1 TWPS0 – Page 178 177 8 ...

Page 9

... Branch if Half Carry Flag Cleared BRTS k Branch if T Flag Set BRTC k Branch if T Flag Cleared BRVS k Branch if Overflow Flag is Set BRVC k Branch if Overflow Flag is Cleared 2503QS–AVR–02/11 ATmega32(L) Operation Flags Rd ← Z,C,N,V,H Rd ← Z,C,N,V,H Rdh:Rdl ← Rdh:Rdl + K Z,C,N,V,S Rd ← Z,C,N,V,H Rd ← Z,C,N,V,H Rd ← Z,C,N,V,H Rd ← ...

Page 10

... Set Twos Complement Overflow. CLV Clear Twos Complement Overflow SET Set T in SREG CLT Clear T in SREG SEH Set Half Carry Flag in SREG 2503QS–AVR–02/11 ATmega32(L) Operation Flags then PC ← None then PC ← None Rd ← Rr None Rd+1:Rd ← Rr+1:Rr None Rd ← ...

Page 11

... Clear Half Carry Flag in SREG MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break 2503QS–AVR–02/11 ATmega32(L) Operation Flags H ← None (see specific descr. for Sleep function) None (see specific descr. for WDR/timer) None For On-Chip Debug Only ...

Page 12

... Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 2503QS–AVR–02/11 (2) Ordering Code Package ATmega32L-8AU 44A (3) ATmega32L-8AUR 44A ATmega32L-8PU 40P6 ATmega32L-8MU 44M1 (3) ATmega32L-8MUR 44M1 ATmega32-16AU 44A (3) ATmega32-16AUR 44A ATmega32-16PU 40P6 ATmega32-16MU 44M1 (3) ATmega32-16MUR 44M1 Package Type ATmega32(L) (1) Operational Range Industrial ...

Page 13

... San Jose, CA 95131 R 2503QS–AVR–02/11 PIN 0°~7° TITLE 44A, 44-lead Body Size, 1.0 mm Body Thickness, 0.8 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) ATmega32( COMMON DIMENSIONS (Unit of Measure = mm) MIN MAX SYMBOL NOM A – – 1.20 A1 0.05 – ...

Page 14

... Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). 2325 Orchard Parkway San Jose, CA 95131 R 2503QS–AVR–02/11 D PIN 0º ~ 15º REF eB TITLE 40P6, 40-lead (0.600"/15.24 mm Wide) Plastic Dual Inline Package (PDIP) ATmega32( COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM A – – A1 0.381 – D 52.070 – ...

Page 15

... Pin #1 Chamfer (C 0.30) Option C Pin #1 Notch e (0.20 R) TITLE 44M1, 44-pad 1.0 mm Body, Lead Pitch 0.50 mm, 5.20 mm Exposed Pad, Thermally Enhanced Plastic Very Thin Quad Flat No Lead Package (VQFN) ATmega32(L) SEATING PLANE SIDE VIEW COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM MAX SYMBOL A ...

Page 16

... Always use OUT or SBI to set EERE in EECR. 2503QS–AVR–02/11 If ATmega32 is the only device in the scan chain, the problem is not visible. Select the Device ID Register of the ATmega32 by issuing the IDCODE instruction or by entering the Test-Logic-Reset state of the TAP controller to read out the contents of its Device ID Register and possibly data from succeeding devices of the scan chain ...

Page 17

... PWM Mode” on page 75 cycle waveform output in fast PWM mode. “Features” on page 1. “Data Retention” on page 6. “Errata” on page 336. ATmega32(L) 333, by replacing the package 44A include Tape & Reel devices. 251. have been removed. 251. “Features” on page 12: “ ...

Page 18

... Figure 1 on page 2, Figure 46 on page “Version” on page 226. “Calibration Byte” on page 258. “Page Size” on page 258. “ATmega32 Typical Characteristics” on page “Ordering Information” on page “Calibrated Internal RC Oscillator” on page ATmega32(L) 81, Table 45 on page 108, 126. 287. ...

Page 19

... Write During Power-down Sleep Mode” on page 204. Table 89 on page 232. “Packaging Information” on page “DC Characteristics” on page “Default Clock Source” on page “External Clock” on page 31 ATmega32(L) “JTAG Interface and On-chip regarding the JTAGEN fuse. page 228. Table 104 on page 257. 327. ...

Page 20

... Table 67 on page 164 (USART and I parameter in “DC Characteristics” on page “Oscillator Calibration Register – OSCCAL” on page 30 258. Table 42. Table 45 and Table Table 118, Table 120, and Table “Errata” on page 336. ATmega32(L) 34. (Timer/Counter2) 287. 46. 121. and “Cali- 20 ...

Page 21

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

Related keywords