AT89C5131A-S3SUM Atmel, AT89C5131A-S3SUM Datasheet - Page 114

IC 8051 MCU FLASH 32K USB 52PLCC

AT89C5131A-S3SUM

Manufacturer Part Number
AT89C5131A-S3SUM
Description
IC 8051 MCU FLASH 32K USB 52PLCC
Manufacturer
Atmel
Series
AT89C513xr
Datasheet

Specifications of AT89C5131A-S3SUM

Core Processor
C52X2
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
LED, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
2-Wire, EUART, SPI, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
34
Number Of Timers
16 bit
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89STK-05
Minimum Operating Temperature
- 40 C
Package
52PLCC
Device Core
8051
Family Name
89C
Maximum Speed
48 MHz
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C5131A-S3SUM
Manufacturer:
ATMEL
Quantity:
46
Part Number:
AT89C5131A-S3SUM
Manufacturer:
Atmel
Quantity:
10 000
Table 20-7.
114
(SSCS)
Status
Code
60h
68h
70h
78h
80h
88h
90h
AT89C5130A/31A-M
Previously addressed with own
Previously addressed with own
General call address has been
Arbitration lost in SLA+R/W as
master; own SLA+W has been
Arbitration lost in SLA+R/W as
Status of the 2-wire bus and
received; NOT ACK has been
has been received; ACK has
master; general call address
general call; data has been
Previously addressed with
Status in Slave Receiver Mode
received; ACK has been
received; ACK has been
received; ACK has been
received; ACK has been
received; ACK has been
SLA+W; data has been
SLA+W; data has been
Own SLA+W has been
2-wire hardware
been returned
returned
returned
returned
returned
returned
returned
No SSDAT action or
No SSDAT action or
No SSDAT action or
No SSDAT action or
No SSDAT action or
Read data byte or
Read data byte or
Read data byte or
Read data byte or
No SSDAT action
No SSDAT action
No SSDAT action
No SSDAT action
No SSDAT action
To/from SSDAT
Read data byte
Read data byte
Application Software Response
STA
X
X
X
X
X
X
X
X
X
X
X
X
0
0
1
1
To SSCON
STO
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SI
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AA
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Next Action Taken By 2-wire Software
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
Switched to the not addressed slave mode; no
recognition of own SLA or GCA
Switched to the not addressed slave mode; own
SLA will be recognised; GCA will be recognised if
GC=logic 1
Switched to the not addressed slave mode; no
recognition of own SLA or GCA. A START
condition will be transmitted when the bus
becomes free
Switched to the not addressed slave mode; own
SLA will be recognised; GCA will be recognised if
GC=logic 1. A START condition will be
transmitted when the bus becomes free
Data byte will be received and NOT ACK will be
returned
Data byte will be received and ACK will be
returned
4337K–USB–04/08

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