AT89C5131A-S3SUM Atmel, AT89C5131A-S3SUM Datasheet - Page 135
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AT89C5131A-S3SUM
Manufacturer Part Number
AT89C5131A-S3SUM
Description
IC 8051 MCU FLASH 32K USB 52PLCC
Manufacturer
Atmel
Series
AT89C513xr
Datasheet
1.AT89C5130A-PUTUM.pdf
(188 pages)
Specifications of AT89C5131A-S3SUM
Core Processor
C52X2
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
LED, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
2-Wire, EUART, SPI, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
34
Number Of Timers
16 bit
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89STK-05
Minimum Operating Temperature
- 40 C
Package
52PLCC
Device Core
8051
Family Name
89C
Maximum Speed
48 MHz
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT89C5131A-S3SUM
Manufacturer:
ATMEL
Quantity:
46
Figure 21-12. Example of REMOTE WAKEUP Management
21.9
4337K–USB–04/08
Detach Simulation
SET_FEATURE: DEVICE_REMOTE_WAKEUP
Detection of a SUSPEND State
Upstream RESUME Sent
When the USB controller receives the SET_FEATURE request: DEVICE_REMOTE_WAKEUP,
the firmware will set to 1 the RMWUPE bit in the USBCON register to enable this functionality.
RMWUPE value will be 0 in the other cases.
If the device is in SUSPEND mode, the USB controller can send an upstream resume by clear-
ing first the SPINT bit in the USBINT register and by setting then to 1 the SDRMWUP bit in the
USBCON register. The USB controller sets to 1 the UPRSM bit in the USBCON register. All
clocks must be enabled first. The Remote Wake is sent only if the USB bus was in Suspend
state for at least 5 ms. When the upstream resume is completed, the UPRSM bit is reset to 0 by
hardware. The firmware will then clear the SDRMWUP bit.
In order to be re-enumerated by the Host, the AT89C5130A/31A-M has the possibility to simu-
late a DETACH - ATTACH of the USB bus.
The V
up as shown in
set to 1 in the USBCON register. Maintaining this output in high impedance for more than 3 µs
will simulate the disconnection of the device. When resetting the DETACH bit, an attach is then
simulated.
REF
UPRSM = 1
output voltage is between 3.0V and 3.6V. This output can be connected to the D+ pull-
Figure
21-13. This output can be put in high-impedance when the DETACH bit is
SPINT
UPRSM
Suspend Management
USB Controller Init
Clear SDRMWUP
Set SDMWUP
Set RMWUPE
Enable Clocks
Clear SPINT
AT89C5130A/31A-M
Need USB Resume
135