PIC32MX440F512H-80I/MR Microchip Technology, PIC32MX440F512H-80I/MR Datasheet - Page 37

• Manufacturer Part Number: PIC32MX440F512H-80I/MR
• Description: IC PIC MCU FLASH 512KX32 64-QFN
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX440F512H-80I/MR

• Core Size: 32-Bit
• Program Memory Size: 512KB (512K x 8)
• Core Processor: MIPS32® M4K™
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Controller Family/series: PIC32
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 5
• Interface: EUSART, I2C, SPI, USB
• No. Of Pwm Channels: 5
• Embedded Interface Type: EUSART, I2C, SPI, USB
• Rohs Compliant: Yes
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C, JTAG, SPI, TWI, UART, USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

17.0
17.1
The checksum is calculated as the 32-bit summation of
all bytes (8-bit quantities) in program Flash, boot Flash
(except device Configuration Words), the Device ID
register with applicable mask, and the device Configu-
ration Words with applicable masks. Next, the 2’s
complement of the summation is calculated. This final
32-bit number is presented as the checksum.
REGISTER 17-1:
© 2010 Microchip Technology Inc.
bit 31
bit 23
bit 15
bit 7
Legend:
R = readable bit
U = unimplemented bit, read as ‘0’
PWP15
R/P-1
r-0
r-1
r-1
—
—
—
CHECKSUM
Theory
PWP14
R/P-1
r-1
r-1
r-1
—
—
—
DEVCFG0 REGISTER OF PIC32MX360F512L
W = writable bit
PWP13
R/P-1
r-1
r-1
r-1
—
—
—
PWP12
R/P-1
R/P-1
CP
r-1
r-1
—
—
P = programmable bit
-n = bit value at POR: (‘0’, ‘1’, x = unknown)
ICESEL
17.2
The mask value of a device Configuration is calculated
by setting all the unimplemented bits to ‘0’ and all the
implemented bits to ‘1’.
For example, Register 17-1 shows the DEVCFG0 reg-
ister of the PIC32MX360F512L device. The mask value
for this register is:
Table 17-1 lists the mask values of the four device Con-
figuration registers and Device ID registers to be used
in the checksum calculations.
For quick reference, Table 17-2 shows the addresses
of DEVCFG and DEVID registers for currently
supported devices.
PWP19
R/P-1
R/P-1
r-1
r-1
—
—
mask_value_devcfg0 = 0x110FF00B
Mask Values
PWP18
R/P-1
r-1
r-1
r-1
—
—
—
r = reserved bit
PWP17
R/P-1
R/P-1
PIC32MX
r-1
r-1
—
—
DEBUG<1:0>
DS61145G-page 37
PWP16
R/P-1
R/P-1
R/P-1
BWP
r-1
—
bit 24
bit 16
bit 8
bit 0