ATMEGA645V-8AU Atmel, ATMEGA645V-8AU Datasheet - Page 145

• Manufacturer Part Number: ATMEGA645V-8AU
• Description: IC AVR MCU FLASH 64K 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA645V-8AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SPI, UART, USI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Controller Family/series: AVR MEGA
• No. Of I/o's: 54
• Eeprom Memory Size: 2KB
• Ram Memory Size: 4KB
• Cpu Speed: 8MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Data Rom Size: 2 KB
• Height: 1 mm
• Length: 14 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 14 mm
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.11.2
17.11.3
17.11.4
2570M–AVR–04/11
TCNT2 – Timer/Counter Register
OCR2A – Output Compare Register A
ASSR – Asynchronous Status Register
• Bit 2:0 – CS22:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see
17-6.
Table 17-6.
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT2 Register blocks (removes) the compare
match on the following timer clock. Modifying the counter (TCNT2) while the counter is running,
introduces a risk of missing a compare match between TCNT2 and the OCR2A Register.
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNT2). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC2A pin.
• Bit 4 – EXCLK: Enable External Clock Input
When EXCLK is written to one, and asynchronous clock is selected, the external clock input buf-
fer is enabled and an external clock can be input on Timer Oscillator 1 (TOSC1) pin instead of a
32kHz crystal. Writing to EXCLK should be done before asynchronous operation is selected.
Note that the crystal Oscillator will only run when this bit is zero.
Bit
(0xB2)
Read/Write
Initial Value
Bit
(0xB3)
Read/Write
Initial Value
Bit
(0xB6)
Read/Write
Initial Value
CS22
0
0
0
0
1
1
1
1
Clock Select Bit Description
R/W
R/W
R
7
–
0
7
0
7
0
CS21
0
0
1
1
0
0
1
1
R
6
–
0
R/W
R/W
6
0
6
0
CS20
R
5
–
0
R/W
R/W
0
1
0
1
0
1
0
1
5
0
5
0
EXCLK
R/W
4
0
R/W
R/W
Description
No clock source (Timer/Counter stopped).
clk
clk
clk
clk
clk
clk
clk
4
0
4
0
OCR2A[7:0]
TCNT2[7:0]
T2S
T2S
T2S
T2S
T2S
T
T
2
2
S
S
ATmega325/3250/645/6450
/256 (From prescaler)
/1024 (From prescaler)
AS2
R/W
/(No prescaling)
/8 (From prescaler)
/32 (From prescaler)
/64 (From prescaler)
/128 (From prescaler)
3
0
R/W
R/W
3
0
3
0
TCN2UB
R
2
0
R/W
R/W
2
0
2
0
OCR2UB
R
1
0
R/W
R/W
1
0
1
0
TCR2UB
R/W
R/W
R
0
0
0
0
0
0
OCR2A
TCNT2
ASSR
Table
145