DSPIC30F5011-30I/PT Microchip Technology, DSPIC30F5011-30I/PT Datasheet

IC DSPIC MCU/DSP 66K 64TQFP

DSPIC30F5011-30I/PT

Manufacturer Part Number
DSPIC30F5011-30I/PT
Description
IC DSPIC MCU/DSP 66K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F5011-30I/PT

Program Memory Type
FLASH
Program Memory Size
66KB (22K x 24)
Package / Case
64-TFQFP
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
Number Of I /o
52
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
52
Data Ram Size
4 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011
Minimum Operating Temperature
- 40 C
Package
64TQFP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
30 MHz
Operating Supply Voltage
2.5|3.3|5 V
Interface Type
CAN/I2C/SPI/UART
On-chip Adc
16-chx12-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPAC30F008 - MODULE SKT FOR DSPIC30F 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F501130IPT
DSPIC30F501130IPT

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0
The dsPIC30F5011/5013 (Rev. A4) samples that you
have received were found to conform to the
specifications and functionality described in the
following documents:
• DS70157 – “dsPIC30F/33F Programmer’s
• DS70116 – “dsPIC30F5011, dsPIC30F5013 Data
• DS70046 – “dsPIC30F Family Reference Manual”
The exceptions to the specifications in the documents
listed above are described in this section. These
exceptions are described for the specific devices listed
below:
• dsPIC30F5011
• dsPIC30F5013
These devices may be identified by the following
message that appears in the MPLAB
Window under MPLAB IDE, when a “Reset and
Connect” operation is performed within MPLAB IDE:
Setting Vdd source to target
Target Device dsPIC30F5013 found,
revision = 0x1004
...Reading ICD Product ID
Running ICD Self Test
...Passed
MPLAB ICD 2 Ready
The errata described in this section will be addressed
in
dsPIC30F5013 devices.
© 2008 Microchip Technology Inc.
Reference Manual”
Sheet”
future
revisions
dsPIC30F5011/5013 Rev. A4 Silicon Errata
of
dsPIC30F5011
®
ICD 2 Output
dsPIC30F5011/5013
and
Silicon Errata Summary
The following list summarizes the errata described in
this document:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Sequential Interrupts
MAC Class Instructions with ±4 Address
Modification
Sequential MAC instructions, which prefetch data
from Y data space using ±4 address modification,
will cause an address error trap.
Decimal Adjust Instruction
The Decimal Adjust instruction, DAW.b, may
improperly clear the Carry bit, C (SR<0>).
PSV Operations Using SR
In certain instructions, fetching one of the
operands from program memory using Program
Space Visibility (PSV) will corrupt specific bits in
the STATUS Register, SR.
Early Termination of Nested DO Loops
When using two DO loops in a nested fashion,
terminating the inner-level DO loop by setting the
EDT (CORCON<11>) bit will produce unexpected
results.
I
Read operations performed on the I2CCON SFR
may yield incorrect results at operation over 20 MIPS.
I
Write operations performed on the I2CTRN SFR may
yield incorrect results at operation over 20 MIPS.
UART – Write Operations on U1MODE and
U2MODE SFRs
Write operations performed on the U1MODE and
U2MODE SFRs may yield incorrect results at
operation over 20 MIPS.
DCI – Stop in Idle mode
The DCI module should not be stopped when the
device enters Idle mode.
4x PLL Operation
The 4x PLL mode of operation may not function
correctly for certain input frequencies.
Sequential interrupts after modifying the CPU IPL,
interrupt IPL, interrupt enable or interrupt flag may
cause an address error trap.
2
2
C™ – Read Operations on I2CCON SFR
C – Write Operations on I2CTRN SFR
DS80399A-page 1

Related parts for DSPIC30F5011-30I/PT

DSPIC30F5011-30I/PT Summary of contents

Page 1

... Rev. A4 Silicon Errata The dsPIC30F5011/5013 (Rev. A4) samples that you have received were found to conform to the specifications and functionality described in the following documents: • DS70157 – “dsPIC30F/33F Programmer’s Reference Manual” • DS70116 – “dsPIC30F5011, dsPIC30F5013 Data Sheet” • DS70046 – “dsPIC30F Family Reference Manual” ...

Page 2

... DISI Instruction The DISI instruction will not disable interrupts if a DISI instruction is executed in the same instruction cycle that the decrements to zero. 12. Output Compare Module in PWM Mode Output compare will produce a glitch when loading 0% duty cycle in PWM mode. It will also miss the next compare after the glitch. ...

Page 3

... MAC class instructions not use the + = address modification not prefetch data from Y data space. © 2008 Microchip Technology Inc. dsPIC30F5011/5013 2. Module: CPU – Instruction DAW.b The Decimal Adjust instruction, DAW.b, may improperly clear the Carry bit, C (SR<0>), when executed ...

Page 4

... Example 2 is demonstrated in Example 3. DS80399A-page 4 These instructions are identified in Table 1. Example 2 demonstrates one scenario where this occurs. Also, always use Work around 2 if the C compiler is used to generate code for dsPIC30F5011/5013 devices. (2) Examples of Incorrect Operation ADDC W0, [W1++], W2 ; SUBB.b W0, [++W1 SUBBR.b W0, [++W1 ...

Page 5

... Note: For details on the functionality of EDT bit, see section 2.9.2.4 in the dsPIC30F Family Reference Manual. © 2008 Microchip Technology Inc. dsPIC30F5011/5013 2 5. Module – Read Operations on I2CCON SFR Data read from the I2CCON Special Function Register (SFR) may not be correct at device operation greater than 20 MIPS for V range of 4 ...

Page 6

... Module – Write Operations on I2CTRN SFR Data writes to the I2CTRN Special Function Register (SFR) may not be correct at device operation greater than 20 MIPS for V range of 4.5V to 5.5V (or 10 MIPS 3.6V). If the dsPIC DSC device needs to operate at a throughput higher than 20 MIPS, the user should incorporate the suggested work around while writing to the I2CTRN SFR ...

Page 7

... X; \ DISICNT = 0; } DISI_PROTECT(SRbits.IPL = 0x5); © 2008 Microchip Technology Inc. dsPIC30F5011/5013 10. Module: Interrupt Controller – Sequential Interrupts When interrupt nesting is enabled (or NSTDIS (INTCON1<15>) bit is ‘0’), the following sequence of events will lead to an address error trap. The generic terms “Interrupt 1” and “Interrupt 2” are used to represent any two enabled dsPIC30F interrupts ...

Page 8

... Module: DISI Instruction When a user executes a DISI #7, for example, this will disable interrupts for cycles (7 + the DISI instruction itself). In this case, the DISI instruction uses a counter which counts down from The counter is loaded with 7 at the end of the DISI instruction. ...

Page 9

... Clear the I C receiver interrupt flag SI2CF back to step 1 to continue receiving incoming data bytes. © 2008 Microchip Technology Inc. dsPIC30F5011/5013 Work around 2: Use this work around for applications in which the receiver interrupt is required. Assuming that the RBF and the I2COV flags in the I2CSTAT ...

Page 10

... Module there are two I C devices on the bus, one of them is acting as the Master receiver and the other as the Slave transmitter. If both devices are config- ured for 10-bit addressing mode, and have the same value in the A10 and A9 bits of their ...

Page 11

... C language, MPLAB C30 version 3.11 or higher, provides the following command-line switch that implements a work around for the erratum. -merrata=psv_trap Refer to the readme.txt file in the MPLAB C30 v3.11 tool suite for further details. © 2008 Microchip Technology Inc. dsPIC30F5011/5013 DS80399A-page 11 ...

Page 12

... APPENDIX A: REVISION HISTORY Revision A (9/2008) Initial version of the document. DS80399A-page 12 © 2008 Microchip Technology Inc. ...

Page 13

... PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 14

... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2008 Microchip Technology Inc. 01/02/08 ...

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