AT89C5115-RATUM Atmel, AT89C5115-RATUM Datasheet - Page 17

• Manufacturer Part Number: AT89C5115-RATUM
• Description: IC 8051 MCU FLASH 16K 32VQFP
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C5115-RATUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFP, 32-VQFP
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 20
• Number Of Timers: 2
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: CANADAPT28
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 32VQFP
• Device Core: 8051
• Family Name: 89C
• Maximum Speed: 40 MHz
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register
4128G–8051–02/08
Table 11. CKCON Register
CKCON (S:8Fh)
Clock Control Register
Note:
Reset Value = x000 0000b
Number
Bit
7
-
7
6
5
4
3
2
1
0
1. This control bit is validated when the CPU clock bit X2 is set; when X2 is low, this bit
has no effect.
Mnemonic Description
WDX2
PCAX2
WDX2
T2X2
T1X2
T0X2
SIX2
Bit
X2
6
-
Reserved
Do not set this bit.
Watchdog Clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Programmable Counter Array Clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Enhanced UART clock (MODE 0 and 2)
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Timer 2 Clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Timer 1 Clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Timer 0 Clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
CPU Clock
Clear to select 12 clock periods per machine cycle (STD mode) for CPU and all
the peripherals.
Set to select 6 clock periods per machine cycle (X2 Mode) and to enable the
individual peripherals ’X2’ bits.
PCAX2
5
(1)
(1)
(1)
SIX2
(1)
4
T2X2
3
(1)
(1)
T1X2
2
T0X2
1
X2
0
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