AT91SAM7L64-AU Atmel, AT91SAM7L64-AU Datasheet - Page 506
![MCU ARM7 64K HS FLASH 128-LQFP](/photos/6/71/67112/128-lqfp_sml.jpg)
AT91SAM7L64-AU
Manufacturer Part Number
AT91SAM7L64-AU
Description
MCU ARM7 64K HS FLASH 128-LQFP
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM7L64-AU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
36MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.55 V ~ 1.8 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-LQFP
Controller Family/series
AT91SAM7xxx
No. Of I/o's
80
Ram Memory Size
6KB
Cpu Speed
36MHz
No. Of Timers
1
Rohs Compliant
Yes
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
6 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
36 MHz
Number Of Programmable I/os
80
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
For Use With
AT91SAM7L-STK - KIT EVAL FOR AT91SAM7LAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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34.7
Table 34-4.
506
Offset
0x200
0x2C
0x10
0x20
0x24
0x28
Segment LCD Controller (SLCDC) User Interface
OxC
0x0
0x4
0x8
AT91SAM7L128/64 Preliminary
Register Mapping
Register
SLCDC Control Register
SLCDC Mode Register
SLCDC Frame Rate Register
SLCDC Display Register
SLCDC Status Register
SLCDC Interrupt Enable Register
SLCDC Interrupt Disable Register
SLCDC Interrupt Mask Register
SLCDC Interrupt Status Register
SLCDC Memory Register
SLCDC_MEM
SLCDC_FRR
SLCDC_IDR
SLCDC_IMR
SLCDC_IER
SLCDC_ISR
SLCDC_MR
SLCDC_CR
SLCDC_DR
SLCDC_SR
Name
Read-write
Read-write
Read-write
Read-write
Write-only
Read-only
Write-only
Write-only
Write-only
Read-only
Access
6257A–ATARM–20-Feb-08
Reset
0x0
0x0
0x0
0x0
0x0
0x0
-
-
-
-
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