ATXMEGA128A1-CU Atmel, ATXMEGA128A1-CU Datasheet - Page 62
![MCU AVR 128K FLASH 1.6V 100-CBGA](/photos/6/89/68968/313-100-cbga_sml.jpg)
ATXMEGA128A1-CU
Manufacturer Part Number
ATXMEGA128A1-CU
Description
MCU AVR 128K FLASH 1.6V 100-CBGA
Manufacturer
Atmel
Series
AVR® XMEGAr
Datasheet
1.ATAVRONEKIT.pdf
(113 pages)
Specifications of ATXMEGA128A1-CU
Core Processor
AVR
Core Size
8/16-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
78
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 3.6 V
Data Converters
A/D 16x12b, D/A 4x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Processor Series
ATXMEGA128x
Core
AVR8
Data Bus Width
8 bit, 16 bit
Data Ram Size
8 KB
Interface Type
I2C/SPI/USART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
78
Number Of Timers
8
Operating Supply Voltage
1.6 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT, ATQT600
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (8-ch x 12-bit)
On-chip Dac
2 (2-ch x 12-bit)
Package
100CBGA
Device Core
AVR
Family Name
XMEGA
Maximum Speed
32 MHz
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFPATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFPATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATXMEGA128A1-CU
Manufacturer:
Atmel
Quantity:
33
Part Number:
ATXMEGA128A1-CU
Manufacturer:
AT
Quantity:
20 000
8067M–AVR–09/10
Mnemonics
LD
LDD
LD
LD
LD
LDD
STS
ST
ST
ST
ST
ST
ST
STD
ST
ST
ST
STD
LPM
LPM
LPM
ELPM
ELPM
ELPM
SPM
SPM
IN
OUT
PUSH
POP
LSL
LSR
Operands
Rd, -Y
Rd, Y+q
Rd, Z
Rd, Z+
Rd, -Z
Rd, Z+q
k, Rr
X, Rr
X+, Rr
-X, Rr
Y, Rr
Y+, Rr
-Y, Rr
Y+q, Rr
Z, Rr
Z+, Rr
-Z, Rr
Z+q,Rr
Rd, Z
Rd, Z+
Rd, Z
Rd, Z+
Z+
Rd, A
A, Rr
Rr
Rd
Rd
Rd
Description
Load Indirect and Pre-Decrement
Load Indirect with Displacement
Load Indirect
Load Indirect and Post-Increment
Load Indirect and Pre-Decrement
Load Indirect with Displacement
Store Direct to Data Space
Store Indirect
Store Indirect and Post-Increment
Store Indirect and Pre-Decrement
Store Indirect
Store Indirect and Post-Increment
Store Indirect and Pre-Decrement
Store Indirect with Displacement
Store Indirect
Store Indirect and Post-Increment
Store Indirect and Pre-Decrement
Store Indirect with Displacement
Load Program Memory
Load Program Memory
Load Program Memory and Post-Increment
Extended Load Program Memory
Extended Load Program Memory
Extended Load Program Memory and Post-
Increment
Store Program Memory
Store Program Memory and Post-Increment
by 2
In From I/O Location
Out To I/O Location
Push Register on Stack
Pop Register from Stack
Logical Shift Left
Logical Shift Right
Bit and Bit-test Instructions
(RAMPZ:Z)
(RAMPZ:Z)
Rd(n+1)
STACK
(Y + q)
(Z + q)
I/O(A)
Rd(0)
Rd(n)
Rd(7)
Operation
(X)
(X)
(X)
(Y)
(Y)
(Y)
Rd
Rd
Rd
Rd
Rd
Rd
(Z)
(Z)
R0
Rd
Rd
R0
Rd
Rd
Rd
Rd
(k)
C
C
Y
Z
Z
X
X
Y
Y
Z
Z
Z
Z
Z
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
Y - 1
(Y)
(Y + q)
(Z)
(Z),
Z+1
Z - 1,
(Z)
(Z + q)
Rd
Rr
Rr,
X + 1
X - 1,
Rr
Rr
Rr,
Y + 1
Y - 1,
Rr
Rr
Rr
Rr
Z + 1
Z - 1
Rr
(Z)
(Z)
(Z),
Z + 1
(RAMPZ:Z)
(RAMPZ:Z)
(RAMPZ:Z),
Z + 1
R1:R0
R1:R0,
Z + 2
I/O(A)
Rr
Rr
STACK
Rd(n),
0,
Rd(7)
Rd(n+1),
0,
Rd(0)
XMEGA A1
Flags
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
Z,C,N,V,H
Z,C,N,V
#Clocks
2
2
1
1
2
2
2
1
1
2
1
1
2
2
1
1
2
2
1
2
(1)(2)
(1)(2)
(1)(2)
(1)(2)
(1)(2)
(1)(2)
3
3
3
3
3
3
1
1
1
1
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
-
-
(1)
(1)
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