ATMEGA64-16MU Atmel, ATMEGA64-16MU Datasheet - Page 5
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ATMEGA64-16MU
Manufacturer Part Number
ATMEGA64-16MU
Description
IC AVR MCU 64K 16MHZ 5V 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA64-16MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
2-Wire, JTAG, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Number Of Timers
4
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
64MLF EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Controller Family/series
AVR MEGA
No. Of I/o's
53
Eeprom Memory Size
2KB
Ram Memory Size
4KB
Cpu Speed
16MHz
Rohs Compliant
Yes
Cpu Family
ATmega
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
4KB
# I/os (max)
53
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5/5.8V
Operating Supply Voltage (min)
4.2/4.5V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
MLF EP
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFPATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ATmega103
Compatibility Mode
Pin Descriptions
VCC
GND
Port A (PA7..PA0)
Port B (PB7..PB0)
2490QS–AVR–07/10
By programming the M103C Fuse, the ATmega64 will be compatible with the ATmega103
regards to RAM, I/O pins and Interrupt Vectors as described above. However, some new fea-
tures in ATmega64 are not available in this compatibility mode, these features are listed below:
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Digital supply voltage.
Ground.
Port A is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port A output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port A pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port A pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port A also serves the functions of various special features of the ATmega64 as listed on
73.
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port B output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port B also serves the functions of various special features of the ATmega64 as listed on
74.
One USART instead of two, asynchronous mode only. Only the eight least significant bits of
the Baud Rate Register is available.
One 16 bits Timer/Counter with two compare registers instead of two 16 bits Timer/Counters
with three compare registers.
Two-wire serial interface is not supported.
Port G serves alternate functions only (not a general I/O port).
Port F serves as digital input only in addition to analog input to the ADC.
Boot Loader capabilities is not supported.
It is not possible to adjust the frequency of the internal calibrated RC Oscillator.
The External Memory Interface can not release any Address pins for general I/O, neither
configure different wait states to different External Memory Address sections.
Only EXTRF and PORF exist in the MCUCSR Register.
No timed sequence is required for Watchdog Timeout change.
Only low-level external interrupts can be used on four of the eight External Interrupt sources.
Port C is output only.
USART has no FIFO buffer, so Data OverRun comes earlier.
The user must have set unused I/O bits to 0 in ATmega103 programs.
ATmega64(L)
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