DSPIC30F6012A-30I/PT Microchip Technology, DSPIC30F6012A-30I/PT Datasheet

IC DSPIC MCU/DSP 144K 64TQFP

DSPIC30F6012A-30I/PT

Manufacturer Part Number
DSPIC30F6012A-30I/PT
Description
IC DSPIC MCU/DSP 144K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf (66 pages)
2.DSPIC30F6011A-30IPT.pdf (234 pages)
3.DSPIC30F6011A-30IPT.pdf (8 pages)
4.DSPIC30F6011A-30IPT.pdf (10 pages)
5.DSPIC30F6011A-30IPT.pdf (6 pages)
6.DSPIC30F6011A-30IPT.pdf (8 pages)
7.DSPIC30F6011A-30IPT.pdf (16 pages)
8.DSPIC30F6014A-20EPT.pdf (238 pages)

Specifications of DSPIC30F6012A-30I/PT

Program Memory Type
FLASH
Program Memory Size
144KB (48K x 24)
Package / Case
64-TFQFP
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
Number Of I /o
52
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
52
Data Ram Size
8 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPAC30F008 - MODULE SKT FOR DSPIC30F 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F6012A30IP

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dsPIC30F6011A, dsPIC30F6012A,
dsPIC30F6013A, dsPIC30F6014A
(Rev. A2) Silicon Errata
The dsPIC30F6011A/6012A/6013A/6014A (Rev. A2)
samples you have received were found to conform to
the specifications and functionality described in the
following documents:
• DS70157 – “dsPIC30F/33F Programmer’s
• DS70143 – “dsPIC30F6011A, dsPIC30F6012A,
• DS70046 – “dsPIC30F Family Reference Manual”
The exceptions to the specifications in the documents
listed above are described in this section. The specific
devices for which these exceptions are described are
listed below:
• dsPIC30F6011A
• dsPIC30F6012A
• dsPIC30F6013A
• dsPIC30F6014A
dsPIC30F601XA Rev. A2 silicon is identified by
performing a “Reset and Connect” operation to the
device using MPLAB
The following text is then visible under the MPLAB ICD 2
section in the output window within MPLAB IDE:
MPLAB ICD 2 Ready
Connecting to MPLAB ICD 2
...Connected
Setting Vdd source to target
Target Device dsPIC30F6014A found,
revision = Rev 0x1002
...Reading ICD Product ID
Running ICD Self Test
...Passed
MPLAB ICD 2 Ready".
The errata described in this section will be fixed in
future revisions of dsPIC30F6011A, dsPIC30F6012A,
dsPIC30F6013A and dsPIC30F6014A silicon.
© 2006 Microchip Technology Inc.
dsPIC30F6011A/6012A/6013A/6014A Rev. A2 Silicon Errata
Reference Manual”
dsPIC30F6013A, dsPIC30F6014A Data Sheet”
®
ICD 2 within the MPLAB IDE.
6012A/6013A/6014A
Silicon Errata Summary
The following list summarizes the errata described in
further detail through the remainder of this document:
1.
2.
3.
4.
5.
6.
7.
8.
9.
The following sections will describe the errata and work
around to these errata, where they may apply.
MAC Class Instruction with ±4 Address
Modification
Sequential MAC instructions, which prefetch data
from Y data space using ±4 address modification
will cause an address error trap.
Decimal Adjust Instruction
The Decimal Adjust instruction, DAW.b, may
improperly clear the Carry bit, C (SR<0>).
DISI Instruction
The DISI instruction will not disable interrupts if a
DISI instruction is executed in the same instruc-
tion cycle that the DISI counter decrements to
zero.
Output Compare Module in PWM Mode
Output compare will produce a glitch when loading
0% duty cycle in PWM mode. It will also miss the
next compare after the glitch.
Output Compare
The output compare module will produce a glitch
on the output when an I/O pin is initially set high
and the module is configured to drive the pin low at
a specified time.
Using OSC2/RC15 as Digital I/O or CLKOUT
For this revision of silicon, pin OSC2/RC15 is oper-
ational for digital I/O and CLKOUT only in specific
oscillator modes.
LP Oscillator
For this revision of silicon, the LP Oscillator is not
operational.
INT0, ADC and Sleep Mode
ADC event triggers from the INT0 pin will not
wake-up the device from Sleep mode if the SMPI
bits are non-zero.
4x and 8x PLL Mode
If 4x or 8x PLL mode is used, the input frequency
range is 5 MHz-10 MHz instead of 4 MHz-10 MHz.
dsPIC30F6011A/
DS80242C-page 1

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DSPIC30F6012A-30I/PT Summary of contents

Page 1

... Rev 0x1002 ...Reading ICD Product ID Running ICD Self Test ...Passed MPLAB ICD 2 Ready". The errata described in this section will be fixed in future revisions of dsPIC30F6011A, dsPIC30F6012A, dsPIC30F6013A and dsPIC30F6014A silicon. © 2006 Microchip Technology Inc. dsPIC30F6011A/ 6012A/6013A/6014A Silicon Errata Summary The following list summarizes the errata described in further detail through the remainder of this document: 1 ...

Page 2

... Load a value greater than ‘0’ to the OCxRS register when operating in PWM mode. In this case duty cycle is achievable the application requires 0% duty cycles, the output compare module can be disabled for 0% duty cycles, and re-enabled for non-zero percent duty cycles. © 2006 Microchip Technology Inc ...

Page 3

... Work around None. However, the user may use a timer interrupt and write to the associated PORT register to control the pin manually. © 2006 Microchip Technology Inc. 6. Module: Using OSC2/RC15 as Digital I/O or CLKOUT Table 20-2 (see below) from the “dsPIC30F6011A/ 6012A/6013A/6014A Data Sheet” (DS70143A) lists the device clock operational modes ...

Page 4

... OSC2 Function OSC2 0 1 OSC2 1 0 OSC2 1 1 OSC2 0 1 OSC2 1 0 OSC2 1 1 OSC2 0 1 OSC2 1 0 OSC2 OSC2 0 0 OSC2 1 0 CLKOUT 1 1 CLKOUT OSC2 0 0 (Note (Note (Note © 2006 Microchip Technology Inc. ...

Page 5

... Module: 4x and 8x PLL Mode PLL mode is used, the input frequency range is 5 MHz-10 MHz instead of 4 MHz-10 MHz. Work around None PLL is used, make sure the input crystal or clock frequency is 5 MHz or greater. © 2006 Microchip Technology Inc. DS80242C-page 5 ...

Page 6

... APPENDIX A: REVISION HISTORY Revision A (7/2005) Original version of the document Confidential. Revision B (8/2005) Revision C (9/2006) Added errata #1, #3, #4, #5, #8, #9. DS80242C-page 6 marked as © 2006 Microchip Technology Inc. ...

Page 7

... Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 8

... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2006 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-3910 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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