DSPIC30F6012A-30I/PF Microchip Technology, DSPIC30F6012A-30I/PF Datasheet - Page 113
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DSPIC30F6012A-30I/PF
Manufacturer Part Number
DSPIC30F6012A-30I/PF
Description
IC DSPIC MCU/DSP 144K 64TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20IP.pdf
(26 pages)
3.DSPIC30F6011A-30IPT.pdf
(234 pages)
4.DSPIC30F6011A-30IPT.pdf
(8 pages)
5.DSPIC30F6011A-30IPT.pdf
(10 pages)
6.DSPIC30F6011A-30IPT.pdf
(6 pages)
7.DSPIC30F6011A-30IPT.pdf
(8 pages)
8.DSPIC30F6011A-30IPT.pdf
(16 pages)
9.DSPIC30F6011A-30IPF.pdf
(236 pages)
Specifications of DSPIC30F6012A-30I/PF
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
144KB (48K x 24)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
52
Flash Memory Size
144KB
Supply Voltage Range
2.5V To 5.5V
Package
64TQFP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
30 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
52
Interface Type
CAN/I2C/SPI/UART
On-chip Adc
16-chx12-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT64PT4 - SOCKET TRAN ICE 64MQFP/TQFPAC164313 - MODULE SKT FOR PM3 64PFAC30F002 - MODULE SOCKET DSPIC30F 64TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F6012A-30I/PF
Manufacturer:
Holtek
Quantity:
175
Company:
Part Number:
DSPIC30F6012A-30I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC30F6012A-30I/PF
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
17.0
17.1
The Controller Area Network (CAN) module is a serial
interface, useful for communicating with other CAN
modules
interface/protocol
communications within noisy environments.
The CAN module is a communication controller imple-
menting the CAN 2.0 A/B protocol, as defined in the
BOSCH specification. The module will support
CAN 1.2, CAN 2.0A, CAN 2.0B Passive and CAN 2.0B
Active
implementation is a full CAN system. The CAN
specification is not covered within this data sheet. The
reader may refer to the BOSCH CAN specification for
further details.
The module features are as follows:
• Implementation of the CAN protocol CAN 1.2,
• Standard and extended data frames
• 0-8 bytes data length
• Programmable bit rate up to 1 Mbit/sec
• Support for remote frames
• Double-buffered receiver with two prioritized
• 6 full (standard/extended identifier) acceptance
• 2 full acceptance filter masks, one each
• Three transmit buffers with application specified
• Programmable wake-up functionality with
• Programmable Loopback mode supports self-test
• Signaling via interrupt capabilities for all CAN
• Programmable clock source
• Programmable link to Input Capture module (IC2,
© 2008 Microchip Technology Inc.
Note:
CAN 2.0A and CAN 2.0B
received message storage buffers (each buffer
may contain up to 8 bytes of data)
filters, 2 associated with the high priority receive
buffer and 4 associated with the low priority
receive buffer
associated with the high and low priority receive
buffers
prioritization and abort capability (each buffer may
contain up to 8 bytes of data)
integrated low-pass filter
operation
receiver and transmitter error states
for both CAN1 and CAN2) for time-stamping and
network synchronization
versions
CAN MODULE
Overview
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals, register descriptions and
general device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046).
or
microcontroller
of
was
dsPIC30F6011A/6012A/6013A/6014A
the
protocol.
designed
devices.
The
to
module
allow
This
• Low-power Sleep and Idle mode
The CAN bus module consists of a protocol engine and
message buffering/control. The CAN protocol engine
handles all functions for receiving and transmitting
messages on the CAN bus. Messages are transmitted
by first loading the appropriate data registers. Status
and errors can be checked by reading the appropriate
registers. Any message detected on the CAN bus is
checked for errors and then matched against filters to
see if it should be received and stored in one of the
receive registers.
17.2
The CAN module transmits various types of frames
which include data messages or remote transmission
requests initiated by the user, as other frames that are
automatically generated for control purposes. The
following frame types are supported:
• Standard Data Frame:
• Extended Data Frame:
• Remote Frame:
• Error Frame:
• Overload Frame:
• Interframe Space:
A standard data frame is generated by a node
when the node wishes to transmit data. It includes
an 11-bit Standard Identifier (SID) but not an 18-bit
Extended Identifier (EID).
An extended data frame is similar to a standard
data frame but includes an extended identifier as
well.
It is possible for a destination node to request the
data from the source. For this purpose, the
destination node sends a remote frame with an
identifier that matches the identifier of the required
data frame. The appropriate data source node will
then send a data frame as a response to this
remote request.
An error frame is generated by any node that
detects a bus error. An error frame consists of 2
fields: an error flag field and an error delimiter
field.
An overload frame can be generated by a node as
a result of 2 conditions. First, the node detects a
dominant bit during interframe space which is an
illegal
conditions, the node is not yet able to start
reception of the next message. A node may
generate a maximum of 2 sequential overload
frames to delay the start of the next message.
Interframe space separates a proceeding frame
(of whatever type) from a following data or remote
frame.
Frame Types
condition.
Second,
due
DS70143D-page 113
to
internal