ATMEGA2560V-8CU Atmel, ATMEGA2560V-8CU Datasheet - Page 169
ATMEGA2560V-8CU
Manufacturer Part Number
ATMEGA2560V-8CU
Description
IC MCU AVR 256K FLASH 100-CBGA
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA2560V-8CU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
86
Program Memory Size
256KB (128K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFBGA
Processor Series
ATMEGA256x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
86
Number Of Timers
6
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Operating Supply Voltage
1.8 V to 5.5 V
For Use With
ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK503 - STARTER KIT AVR EXP MODULE 100PATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA2560V-8CU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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17. Timer/Counter 0, 1, 3, 4, and 5 Prescaler
17.1
17.2
17.3
2549M–AVR–09/10
Internal Clock Source
Prescaler Reset
External Clock Source
Timer/Counter 0, 1, 3, 4, and 5 share the same prescaler module, but the Timer/Counters can
have different prescaler settings. The description below applies to all Timer/Counters. Tn is used
as a general name, n = 0, 1, 3, 4, or 5.
The Timer/Counter can be clocked directly by the system clock (by setting the CSn2:0 = 1). This
provides the fastest operation, with a maximum Timer/Counter clock frequency equal to system
clock frequency (f
clock source. The prescaled clock has a frequency of either f
f
The prescaler is free running, that is, operates independently of the Clock Select logic of the
Timer/Counter, and it is shared by the Timer/Counter Tn. Since the prescaler is not affected by
the Timer/Counter’s clock select, the state of the prescaler will have implications for situations
where a prescaled clock is used. One example of prescaling artifacts occurs when the timer is
enabled and clocked by the prescaler (6 > CSn2:0 > 1). The number of system clock cycles from
when the timer is enabled to the first count occurs can be from 1 to N+1 system clock cycles,
where N equals the prescaler divisor (8, 64, 256, or 1024).
It is possible to use the prescaler reset for synchronizing the Timer/Counter to program execu-
tion. However, care must be taken if the other Timer/Counter that shares the same prescaler
also uses prescaling. A prescaler reset will affect the prescaler period for all Timer/Counters it is
connected to.
An external clock source applied to the Tn pin can be used as Timer/Counter clock (clk
Tn pin is sampled once every system clock cycle by the pin synchronization logic. The synchro-
nized (sampled) signal is then passed through the edge detector.
equivalent block diagram of the Tn synchronization and edge detector logic. The registers are
clocked at the positive edge of the internal system clock (
high period of the internal system clock.
The edge detector generates one clk
= 6) edge it detects.
Figure 17-1. Tn/T0 Pin Sampling
CLK_I/O
Tn
clk
I/O
/1024.
D
LE
CLK_I/O
Q
Synchronization
). Alternatively, one of four taps from the prescaler can be used as a
D
Q
ATmega640/1280/1281/2560/2561
Tn
pulse for each positive (CSn2:0 = 7) or negative (CSn2:0
clk
CLK_I/O
I/O
D
). The latch is transparent in the
Figure 17-1
Q
/8, f
CLK_I/O
Edge Detector
/64, f
shows a functional
CLK_I/O
Tn_sync
(To Clock
Select Logic)
Tn
/256, or
). The
169
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