Z8F1622AR020SG Zilog, Z8F1622AR020SG Datasheet - Page 215
Z8F1622AR020SG
Manufacturer Part Number
Z8F1622AR020SG
Description
IC ENCORE MCU FLASH 16K 64LQFP
Manufacturer
Zilog
Series
Encore!® XP®r
Specifications of Z8F1622AR020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
64-LQFP
Processor Series
Z8F162x
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Number Of Timers
4
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 12 Channel
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
269-4241
Z8F1622AR020SG
Z8F1622AR020SG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8F1622AR020SG
Manufacturer:
Zilog
Quantity:
160
Company:
Part Number:
Z8F1622AR020SG
Manufacturer:
Zilog
Quantity:
2 500
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Table 101. On-Chip Debugger Commands (Continued)
PS019921-0308
Debug Command
Read Program Memory
CRC
Reserved
Step Instruction
Stuff Instruction
Execute Instruction
Reserved
In the following list of OCD Commands, data and commands sent from the host to the On-
Chip Debugger are identified by ‘
Debugger back to the host is identified by ‘
•
•
•
•
•
Read OCD Revision (00H)—The Read OCD Revision command determines the
version of the On-Chip Debugger. If OCD commands are added, removed, or
changed, this revision number changes.
Read OCD Status Register (02H)—The Read OCD Status Register command reads
the OCDSTAT register.
Write OCD Control Register (04H)—The Write OCD Control Register command
writes the data that follows to the OCDCTL register. When the Read Protect Option
Bit is enabled, the DBGMODE bit (OCDCTL[7]) can only be set to 1, it cannot be
cleared to 0 and the only method of putting the device back into normal operating
mode is to reset the device.
Read OCD Control Register (05H)—The Read OCD Control Register command
reads the value of the OCDCTL register.
Write Program Counter (06H)—The Write Program Counter command writes the
data that follows to the eZ8 CPU’s Program Counter (PC). If the device is not in
DBG ← 00H
DBG → OCDREV[15:8] (Major revision number)
DBG → OCDREV[7:0] (Minor revision number)
DBG ← 02H
DBG → OCDSTAT[7:0]
DBG ← 04H
DBG ← OCDCTL[7:0]
DBG ← 05H
DBG → OCDCTL[7:0]
Command
Byte
13H - FFH
0EH
0FH
10H
12H
11H
Enabled when
NOT in DEBUG
mode?
DBG ← Command/Data
-
-
-
-
-
-
DBG → Data
Disabled by
Read Protect Option Bit
Z8 Encore! XP
’
’. Data sent from the On-Chip
Product Specification
Disabled
Disabled
Disabled
-
-
-
®
On-Chip Debugger
F64XX Series
201
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