Z8F1622AR020SG Zilog, Z8F1622AR020SG Datasheet - Page 249
Z8F1622AR020SG
Manufacturer Part Number
Z8F1622AR020SG
Description
IC ENCORE MCU FLASH 16K 64LQFP
Manufacturer
Zilog
Series
Encore!® XP®r
Specifications of Z8F1622AR020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
64-LQFP
Processor Series
Z8F162x
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Number Of Timers
4
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 12 Channel
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
269-4241
Z8F1622AR020SG
Z8F1622AR020SG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8F1622AR020SG
Manufacturer:
Zilog
Quantity:
160
Company:
Part Number:
Z8F1622AR020SG
Manufacturer:
Zilog
Quantity:
2 500
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PS019921-0308
(Output)
(Output)
DE
TXD
Figure 56
Clear To Send input signal (CTS) is not used for flow control. In this example, it is
assumed that the Driver Enable polarity has been configured to be Active Low and is
represented here by DE. DE asserts after the UART Transmit Data Register has been
written. DE remains asserted for multiple characters as long as the Transmit Data register
is written with the next character before the current character has completed.
Table 121. UART Timing without CTS
Parameter Abbreviation
T
T
1
2
and
DE Assertion to TXD Falling Edge (Start)
Delay
End of Stop Bit(s) to DE Deassertion Delay 1 * XIN period 2 * XIN period
Table 121
Figure 56. UART Timing without CTS
T
1
Start
provide timing information for UART pins for the case where the
Bit 0
Bit 1
Z8 Encore! XP
Bit 7
1 Bit period
Minimum
Product Specification
Parity
Delay (ns)
Electrical Characteristics
®
Stop
Stop Bit(s)
F64XX Series
1 Bit period +
1 * XIN period
End of
Maximum
T
2
235
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