EZ80F93AZ020SG Zilog, EZ80F93AZ020SG Datasheet - Page 4

IC ACCLAIM MCU 64KB 100LQFP

EZ80F93AZ020SG

Manufacturer Part Number
EZ80F93AZ020SG
Description
IC ACCLAIM MCU 64KB 100LQFP
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Datasheets

Specifications of EZ80F93AZ020SG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
24
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Processor Series
EZ80F93x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, IrDA, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
24
Number Of Timers
6
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F920200ZCOG
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
Other names
269-3874
EZ80F93AZ020SG

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EZ80F93AZ020SG
Manufacturer:
Zilog
Quantity:
10 000
Table 1. Errata to eZ80F92 and eZ80F93 Devices (Continued)
UP004909-0910
No
Issue
Detailed Description
(continued from previous page)
PB3 Input, falling or rising edge interrupt, depending on hardware
PB4 Input (not used)
PB5 Input, falling edge interrupt
PB6 Input, dual edge interrupt
PB7 Input, falling edge interrupt: could be Rising, Dual or left floating
Using the above example, if PB0 is Input, falling edge interrupt, then
PB7 must be a separate input, EDGE MODE interrupt.
In this example, PB7 is setup as a falling edge interrupt the same way
as PB0.
This additional separate input interrupt signal connected to PB7 could
be rising, falling, dual, or you can leave it unconnected (OPEN) as well.
You must not use PB7 for GPIO I/O or LEVEL sensitive interrupts.
This same thought process is applicable to all Port bits pairs, specifically
bits 0 and 7, 1 and 6, 2 and 5, and 3 and 4.
configuration
(OPEN connection)
Product Update: Errata for eZ80F92 and eZ80F93 MCUs
Page 4 of 7

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