Z16F6411FI20SG Zilog, Z16F6411FI20SG Datasheet - Page 52

• Manufacturer Part Number: Z16F6411FI20SG
• Description: IC ZNEO MCU FLASH 64K 80QFP
• Manufacturer: Zilog
• Series: Encore!® ZNEOr

Specifications of Z16F6411FI20SG

• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-BQFP
• Processor Series: Z16F6x
• Core: Zneo
• Data Bus Width: 16 bit
• Data Ram Size: 4 B
• Interface Type: ESPI, I2C, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z16F2800100ZCOG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4571

PS022008-0810
Table 6. Register File Address Map (Continued)
Address (Hex)
FF_E448
FF_E449
FF_E44A
FF_E44B
FF_E44C
FF_E44D
FF_E44E
FF_E44F
Analog Block Base Address = FF_E500
ADC Base Address = FF_E500
FF_E500
FF_E501
FF_E502
FF_E503
FF_E504
FF_E505
FF_E506
FF_E507
FF_E508-FF_E50F
FF_E510
FF_E511
FF_E512
FF_E513
Option Trim Registers Base Address = FF_FF00
FF_FF00-FF_FF24
FF_FF25
FF_FF26
FF_FF27
Note: XX=Undefined.
Register Description
Reserved
DMA3 Source Address Upper
DMA3 Source Address High
DMA3 Source Address Low
Reserved
DMA3 List Address Upper
DMA3 List Address High
DMA3 List Address Low
ADC0 Control Register
Reserved
ADC0 Data High Byte Register
ADC0 Data Low Bits Register
ADC Sample and Settling Time
Register
ADC Sample Hold Time
ADC Clock Prescale Register
ADC0 MAX Register
Reserved
Comparator and Op-Amp Control
Reserved
ADC Sample Timer Capture High
ADC Sample Timer Capture Low
Reserved for internal Zilog
IPO Trim 1
IPO Trim 2
ADC Reference Voltage Trim
P R E L I M I N A R Y
®
use
DMA3SARU
DMA3SARH
DMA3LARU
DMA3LARH
ADCTCAPH
DMA3SARL
ADCTCAPL
DMA3LARL
Mnemonic
ADC0MAX
IPOTRIM1
IPOTRIM2
ADC0D_H
ADC0CTL
ADC0D_L
ADCTRIM
CMPOPC
ADCSST
ADCCP
ADCST
—
—
—
—
—
—
Product Specification
Peripheral Address Map
Reset (Hex) Page No
ZNEO
00
00
00
00
00
00
00
XX
XX
0F
3F
00
00
00
XX
XX
XX
XX
XX
—
—
—
—
—
—
Z16F Series
288
289
289
289
290
290
247
248
249
249
250
251
252
255
252
253
297
297
298
—
—
—
—
—
—
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