Z16F2811AL20SG Zilog, Z16F2811AL20SG Datasheet - Page 257

• Manufacturer Part Number: Z16F2811AL20SG
• Description: IC ZNEO MCU FLASH 128K 100LQFP
• Manufacturer: Zilog
• Series: Encore!® ZNEOr

Specifications of Z16F2811AL20SG

• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Processor Series: Z16F2x
• Core: Zneo
• Data Bus Width: 16 bit
• Data Ram Size: 4 B
• Interface Type: ESPI, I2C, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 76
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z16F2800100ZCOG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4533

PS022008-0810
Watchdog Timer Reload Unlock Sequence
Following completion of the Stop Mode Recovery, the ZNEO CPU responds to the system
exception request by fetching the System Exception vector and executing code from the
vector address.
WDT Reset in Normal Operation
If configured to generate a Reset when a time-out occurs, the WDT forces the device into
the Reset state. The WDT status bit in the
more information on Reset and the WDT status bit, see the
ery
value.
WDT Reset in STOP Mode
If enabled in STOP mode and configured to generate a Reset when a time-out occurs and
the device is in STOP mode, the WDT initiates a Stop Mode Recovery. Both the WDT
status bit and the STOP bit in the
following WDT time-out in STOP mode. For detailed information, see
Mode Recovery
Writing the unlock sequence to the Watchdog Timer Reload High (WDTH) register
address unlocks the two Watchdog Timer Reload registers (WDTH, and WDTL) to allow
changes to the time-out period. These Write operations to the WDTH register address pro-
duce no effect on the bits in the WDTH register. The locking mechanism prevents spurious
writes to the reload registers.
The following sequence is required to unlock the Watchdog Timer Reload registers
(WDTH and WDTL) for write access:
1. Write
2. Write
3. Write the appropriate value to the Watchdog Timer reload high register (WDTH).
4. Write the appropriate value to the Watchdog Timer reload low register (WDTL).
All steps of the WDT reload unlock sequence must be written in the order just listed. The
value in the Watchdog Timer Reload registers is loaded into the counter every time a
instruction is executed.
on page 58. Following a Reset sequence, the WDT Counter is initialized with its reset
55H
AAH
to the Watchdog Timer Reload High register (WDTH).
to the Watchdog Timer reload high register (WDTH).
on page 58.
P R E L I M I N A R Y
Reset Status and Control Register
Reset Status and Control Register
Reset and Stop Mode Recov-
Product Specification
ZNEO
register are set to 1
Reset and Stop
Watchdog Timer
is set to 1. For
Z16F Series
WDT
241