Z16F2811AL20SG Zilog, Z16F2811AL20SG Datasheet - Page 88

• Manufacturer Part Number: Z16F2811AL20SG
• Description: IC ZNEO MCU FLASH 128K 100LQFP
• Manufacturer: Zilog
• Series: Encore!® ZNEOr

Specifications of Z16F2811AL20SG

• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 100-LQFP
• Processor Series: Z16F2x
• Core: Zneo
• Data Bus Width: 16 bit
• Data Ram Size: 4 B
• Interface Type: ESPI, I2C, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 76
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z16F2800100ZCOG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4533

Table 25. Port A-K Input Data Registers (PxIN)
Table 26. Port A-K Output Data Registers (PxOUT)
GPIO Interrupts
GPIO Control Register Definitions
PS022008-0810
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
Port A-K Input Data Registers
Port A-K Output Data Registers
POUT7
PIN7
R/W
R
7
X
7
0
Many of the GPIO port pins are used as interrupt sources. Some port pins are configured to
generate an interrupt request on either the rising edge or falling edge of the pin input signal.
Other port pin interrupts generate an interrupt when any edge occurs (both rising and
falling). For more information on interrupts using the GPIO pins, see
page 80.
Reading from the Port A-K input data registers (see
from the corresponding port pins. The Port A-K input data registers are Read-only.
PIN[7:0]—Port Input Data
Sampled data from the corresponding port pin input.
0 = Input data is logical 0 (Low).
1 = Input data is logical 1 (High).
The Port A-K output data registers (see
POUT6
PIN6
R/W
X
R
6
6
0
FF_E100, FF_E110, FF_E120, FF_E130, FF_E140,
FF_E101, FF_E111, FF_E121, FF_E131, FF_E141,
FF_E150, FF_E160, FF_E170, FF_E180, FF_E190
FF_E151, FF_E161, FF_E171, FF_E181, FF_E191
POUT5
PIN5
R/W
R
5
X
5
0
P R E L I M I N A R Y
POUT4
PIN4
R/W
X
R
4
4
0
Table
POUT3
26) write output data to the pins.
PIN3
R/W
R
3
X
3
0
Table
POUT2
25) returns the sampled values
PIN2
R/W
X
R
2
2
0
General-Purpose Input/Output
Product Specification
ZNEO
Interrupt Controller
POUT1
PIN1
R/W
R
1
X
1
0
Z16F Series
POUT0
PIN0
R/W
X
R
0
0
0
on
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