MC9S08QE32CFT Freescale Semiconductor, MC9S08QE32CFT Datasheet - Page 12

MCU 8BIT 32K FLASH 48-QFN

MC9S08QE32CFT

Manufacturer Part Number
MC9S08QE32CFT
Description
MCU 8BIT 32K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of MC9S08QE32CFT

Core Processor
HCS08
Core Size
8-Bit
Speed
50MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, PWM, WDT
Number Of I /o
38
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Cpu Family
HCS08
Device Core Size
8b
Interface Type
SCI/SPI
# I/os (max)
40
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2V
On-chip Adc
10-chx12-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
QFN EP
Processor Series
S08QE
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Number Of Programmable I/os
40
Operating Supply Voltage
- 0.3 V to + 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMOQE128, EVBQE128
Minimum Operating Temperature
- 40 C
For Use With
DEMO9S08QE32 - DEMO FOR S08 AND QE32/16DC9S08QE32 - DAUGHTER CARD FOR DEMO9S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Electrical Characteristics
3.5
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions must be used to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade
Integrated Circuits. During the device qualification ESD stresses were performed for the human body
model (HBM), the machine model (MM) and the charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless specified otherwise in the device
specification.
3.6
This section includes information about power supply requirements and I/O pin characteristics.
12
ESD Protection and Latch-Up Immunity
DC Characteristics
1
Latch-up
Machine
Parameter is achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted.
Model
Human
Body
No.
1
2
3
4
Series resistance
Storage capacitance
Number of pulses per pin
Series resistance
Storage capacitance
Number of pulses per pin
Minimum input voltage limit
Maximum input voltage limit
Human body model (HBM)
Machine model (MM)
Charge device model (CDM)
Latch-up current at T
Table 6. ESD and Latch-Up Protection Characteristics
Table 5. ESD and Latch-up Test Conditions
Description
MC9S08QE32 Series MCU Data Sheet, Rev. 6
Rating
1
A
= 85°C
Symbol
Symbol
V
V
V
I
R1
R1
HBM
CDM
LAT
C
C
MM
±2000
±200
±500
±100
Min
Value
1500
–2.5
100
200
7.5
3
0
3
Max
Freescale Semiconductor
Unit
Unit
mA
pF
pF
Ω
Ω
V
V
V
V
V

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