C8051F502-IM Silicon Laboratories Inc, C8051F502-IM Datasheet - Page 227
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C8051F502-IM
Manufacturer Part Number
C8051F502-IM
Description
IC 8051 MCU 64K FLASH 32-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F50xr
Specifications of C8051F502-IM
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
32-QFN
Mfg Application Notes
LIN Bootloader AppNote
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), CAN, LIN, SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 25x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F500DK
Minimum Operating Temperature
- 40 C
On-chip Adc
32-ch x 12-bit
Package
32QFN EP
Device Core
8051
Family Name
C8051F50x
Maximum Speed
50 MHz
Operating Supply Voltage
2.5|3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1559 - KIT REF DESIGN CAN DIAGNOSTIC336-1532 - ADAPTER PROG TOOLSTICK F502336-1531 - PLATFORM PROG TOOLSTCK F502336-1528 - DAUGHTER CARD TOOLSTICK F500336-1527 - KIT DEV FOR C8051F50X
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1515-5
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F502-IM
Manufacturer:
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Quantity:
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Part Number:
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23.1. Supporting Documents
It is assumed the reader is familiar with or has access to the following supporting documents:
1. The I
2. The I
3. System Management Bus Specification—Version 1.1, SBS Implementers Forum.
23.2. SMBus Configuration
Figure 23.2 shows a typical SMBus configuration. The SMBus specification allows any recessive voltage
between 3.0 V and 5.0 V; different devices on the bus may operate at different voltage levels. The bi-direc-
tional SCL (serial clock) and SDA (serial data) lines must be connected to a positive power supply voltage
through a pullup resistor or similar circuit. Every device connected to the bus must have an open-drain or
open-collector output for both the SCL and SDA lines, so that both are pulled high (recessive state) when
the bus is free. The maximum number of devices on the bus is limited only by the requirement that the rise
and fall times on the bus not exceed 300 ns and 1000 ns, respectively.
23.3. SMBus Operation
Two types of data transfers are possible: data transfers from a master transmitter to an addressed slave
receiver (WRITE), and data transfers from an addressed slave transmitter to a master receiver (READ).
The master device initiates both types of data transfers and provides the serial clock pulses on SCL. The
SMBus interface may operate as a master or a slave, and multiple master devices on the same bus are
supported. If two or more masters attempt to initiate a data transfer simultaneously, an arbitration scheme
is employed with a single master always winning the arbitration. It is not necessary to specify one device
as the Master in a system; any device who transmits a START and a slave address becomes the master
for the duration of that transfer.
A typical SMBus transaction consists of a START condition followed by an address byte (Bits7–1: 7-bit
slave address; Bit0: R/W direction bit), one or more bytes of data, and a STOP condition. Bytes that are
received (by a master or slave) are acknowledged (ACK) with a low SDA during a high SCL (see
Figure 23.3). If the receiving device does not ACK, the transmitting device will read a NACK (not acknowl-
edge), which is a high SDA during a high SCL.
The direction bit (R/W) occupies the least-significant bit position of the address byte. The direction bit is set
to logic 1 to indicate a "READ" operation and cleared to logic 0 to indicate a "WRITE" operation.
VIO = 5 V
2
2
C-Bus and How to Use It (including specifications), Philips Semiconductor.
C-Bus Specification—Version 2.0, Philips Semiconductor.
Figure 23.2. Typical SMBus Configuration
VIO = 3 V
Master
Device
Rev. 1.2
Device 1
VIO = 5 V
Slave
C8051F50x/F51x
Device 2
VIO = 3 V
Slave
SDA
SCL
227
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