C8051F321-GM Silicon Laboratories Inc, C8051F321-GM Datasheet - Page 79

IC 8051 MCU 16K FLASH 28MLP

C8051F321-GM

Manufacturer Part Number
C8051F321-GM
Description
IC 8051 MCU 16K FLASH 28MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F32xr
Datasheets

Specifications of C8051F321-GM

Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
21
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2.25 KB
Interface Type
I2C/SMBus/SPI/UART/USB
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
21
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F320DK
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 10-bit or 17-ch x 10-bit
No. Of I/o's
21
Ram Memory Size
1280Byte
Cpu Speed
25MHz
No. Of Timers
4
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1480 - DAUGHTER CARD TOOLSTCK C8051F321770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1449 - ADAPTER PROGRAM TOOLSTICK F321336-1260 - DEV KIT FOR C8051F320/F321
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1261

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9.2.6. Special Function Registers
The direct-access data memory locations from 0x80 to 0xFF constitute the special function registers
(SFRs). The SFRs provide control and data exchange with the CIP-51's resources and peripherals. The
CIP-51 duplicates the SFRs found in a typical 8051 implementation as well as implementing additional
SFRs used to configure and access the sub-systems unique to the MCU. This allows the addition of new
functionality while retaining compatibility with the MCS-51™ instruction set. Table 9.2 lists the SFRs imple-
mented in the CIP-51 System Controller.
The SFR registers are accessed anytime the direct addressing mode is used to access memory locations
from 0x80 to 0xFF. SFRs with addresses ending in 0x0 or 0x8 (e.g. P0, TCON, SCON0, IE, etc.) are bit-
addressable as well as byte-addressable. All other SFRs are byte-addressable only. Unoccupied
addresses in the SFR space are reserved for future use. Accessing these areas will have an indeterminate
effect and should be avoided. Refer to the corresponding pages of the datasheet, as indicated in Table 9.3,
for a detailed description of each register.
E8 ADC0CN PCA0CPL1 PCA0CPH1 PCA0CPL2 PCA0CPH2 PCA0CPL3 PCA0CPH3
E0
D8 PCA0CN
D0
C8 TMR2CN
C0 SMB0CN
B8
B0
A8
A0
F8
F0
98
90
88
80
(bit addressable)
SPI0CN
SCON0
TCON
PSW
ACC
0(8)
P3
P2
P1
P0
IP
IE
B
Table 9.2. Special Function Register (SFR) Memory Map
OSCXCN
SPI0CFG
PCA0MD
REG0CN
TMR3CN
REF0CN
SMB0CF
CLKMUL
P0MDIN
CLKSEL
PCA0L
SBUF0
TMOD
XBR0
1(9)
SP
PCA0CPM
TMR2RLL TMR2RLH
SMB0DAT ADC0GTL ADC0GTH ADC0LTL
TMR3RLL TMR3RLH
SPI0CKR
CPT1CN
P1MDIN
OSCICN
EMI0CN
AMX0N
PCA0H
XBR1
DPL
2(A)
TL0
0
PCA0CPL0 PCA0CPH0 PCA0CPL4 PCA0CPH4
PCA0CPM
SPI0DAT P0MDOUT P1MDOUT P2MDOUT
CPT0CN
P2MDIN
OSCICL
AMX0P
DPH
3(B)
TL1
1
Rev. 1.4
PCA0CPM
CPT1MD
ADC0CF
P3MDIN
P0SKIP
IT01CF
TMR2L
TMR3L
TH0
4(C)
2
PCA0CPM
CPT0MD
P1SKIP
TMR2H
TMR3H
ADC0L
TH1
5(D)
3
C8051F320/1
PCA0CPM
USB0ADR
ADC0LTH
CPT1MX
CKCON
P2SKIP
ADC0H
FLSCL
EIP1
EIE1
6(E)
4
P3MDOUT
USB0XCN
USB0DAT
VDM0CN
RSTSRC
CPT0MX
FLKEY
PSCTL
PCON
EIP2
EIE2
7(F)
79

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