MC9S08AW48CFDE Freescale Semiconductor, MC9S08AW48CFDE Datasheet - Page 53

• Manufacturer Part Number: MC9S08AW48CFDE
• Description: IC MCU 48K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08AW48CFDE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN
• Processor Series: S08AW
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 6
• Operating Supply Voltage: - 0.3 V to + 5.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08AW60E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Package: 48QFN EP
• Family Name: HCS08
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

The first byte of a series of sequential bytes being programmed in burst mode will take the same amount
of time to program as a byte programmed in standard mode. Subsequent bytes will program in the burst
program time provided that the conditions above are met. In the case the next sequential address is the
beginning of a new row, the program time for that byte will be the standard time instead of the burst time.
This is because the high voltage to the array must be disabled and then enabled again. If a new burst
command has not been queued before the current command completes, then the charge pump will be
disabled and high voltage removed from the array.
Freescale Semiconductor
•
The next sequential address selects a byte on the same physical row as the current byte being
programmed. A row of FLASH memory consists of 64 bytes. A byte within a row is selected by
addresses A5 through A0. A new row begins when addresses A5 through A0 are all zero.
PROGRAM FLOW
FLASH BURST
Figure 4-3. FLASH Burst Program Flowchart
YES
MC9S08AC16 Series Data Sheet, Rev. 8
0
WRITE COMMAND (0x25) TO FCMD
TO BUFFER ADDRESS AND DATA
AND CLEAR FCBEF (Note 2)
NEW BURST COMMAND ?
TO LAUNCH COMMAND
WRITE TO FCDIV
WRITE 1 TO FCBEF
WRITE TO FLASH
CLEAR ERROR
FACCERR ?
FACCERR ?
FPVIO OR
FCBEF ?
FCCF ?
START
DONE
1
1
NO
1
NO
(Note 1)
YES
0
0
Note 2: Wait at least four bus cycles before
Note 1: Required only once after reset.
ERROR EXIT
checking FCBEF or FCCF.
Chapter 4 Memory
53