MCF51CN128CLH Freescale Semiconductor, MCF51CN128CLH Datasheet - Page 27

• Manufacturer Part Number: MCF51CN128CLH
• Description: IC MCU 32BIT 128K FLASH 64-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51CNr

Specifications of MCF51CN128CLH

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, SCI, SPI
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Processor Series: MCF51CN
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 24 KB
• Interface Type: I2C, SPI, SCI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 54
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: TWR-MCF51CN-KIT, TWR-SER, TWR-ELEV, TOWER
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 12 Channel
• Package: 64LQFP
• Device Core: ColdFire
• Family Name: MCF51CN
• Maximum Speed: 50.33 MHz
• Number Of Timers: 2
• For Use With: TWR-MCF51CN - KIT TOWER BOARDTWR-MCF51CN-KIT - KIT TOWER BOARD/SERIAL/ELEVATOR
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
1
2
3
4
5
Num
Typical values are based on characterization data at V
This is the shortest pulse that is guaranteed to be recognized as a reset or interrupt pin request. Shorter pulses are not
guaranteed to override reset requests from internal sources.
To enter BDM mode following a POR, BKGD/MS should be held low during the power-up and for a hold time of t
rises above V
This is the minimum assertion time in which the interrupt may be recognized. The correct protocol is to assert the interrupt
request until it is explicitly negated by the interrupt service routine.
Timing is shown with respect to 20% V
10
6
7
8
9
C
D
D
D
C
C
BKGD/MS hold time after issuing background debug
force reset to enter user or BDM modes
IRQ pulse width
Keyboard interrupt pulse width
Port rise and fall time —
Low output drive (PTxDS = 0) (load = 50 pF)
Port rise and fall time —
High output drive (PTxDS = 1) (load = 50 pF)
Stop3 recovery time, from interrupt event to vector fetch
Asynchronous path
Synchronous path
Asynchronous path
Synchronous path
LVD
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
Slew rate control enabled (PTxSE = 1)
Slew rate control disabled (PTxSE = 0)
.
RESET PIN
MCF51CN128 ColdFire Microcontroller Data Sheet, Rev. 4
4
4
IRQ/KBIPx
2
2
Rating
KBIPx
DD
Table 17. Control Timing (continued)
and 80% V
Figure 20. IRQ/KBIPx Timing
Figure 19. Reset Timing
3
DD
DD
5
levels. Temperature range –40 °C to 85 °C.
= 3.3 V, 25 °C unless otherwise stated.
t
t
IHIL
ILIH
t
extrst
t
t
t
t
Symbol
ILIH,
ILIH,
Rise
Rise
t
STPREC
t
MSH
, t
, t
t
t
IHIL
IHIL
Fall
Fall
2 x t
2 x t
Min
100
100
100
—
—
—
—
—
cyc
cyc
Typ
Electrical Characteristics
16
23
—
—
—
—
—
5
9
6
1
Max
10
—
—
—
—
—
—
—
—
—
MSH
after V
Unit
μs
ns
ns
ns
ns
μs
DD
27