MCF51CN128CLH Freescale Semiconductor, MCF51CN128CLH Datasheet - Page 31
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MCF51CN128CLH
Manufacturer Part Number
MCF51CN128CLH
Description
IC MCU 32BIT 128K FLASH 64-LQFP
Manufacturer
Freescale Semiconductor
Series
MCF51CNr
Specifications of MCF51CN128CLH
Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
Ethernet, I²C, SCI, SPI
Peripherals
LVD, PWM, WDT
Number Of I /o
54
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
MCF51CN
Core
ColdFire V1
Data Bus Width
32 bit
Data Ram Size
24 KB
Interface Type
I2C, SPI, SCI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
54
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
TWR-MCF51CN-KIT, TWR-SER, TWR-ELEV, TOWER
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 12 Channel
Package
64LQFP
Device Core
ColdFire
Family Name
MCF51CN
Maximum Speed
50.33 MHz
Number Of Timers
2
For Use With
TWR-MCF51CN - KIT TOWER BOARDTWR-MCF51CN-KIT - KIT TOWER BOARD/SERIAL/ELEVATOR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF51CN128CLH
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MCF51CN128CLH-1M72P
Manufacturer:
FREESCALE
Quantity:
20 000
Freescale Semiconductor
(CPOL = 1)
(CPOL = 0)
(CPOL = 0)
(CPOL = 1)
(OUTPUT)
(OUTPUT)
(INPUT)
(INPUT)
(INPUT)
(INPUT)
(INPUT)
(INPUT)
(INPUT)
(INPUT)
SPSCK
NOTE:
SPSCK
SPSCK
SPSCK
NOTE:
MOSI
MISO
MISO
MOSI
1. Not defined but normally LSB of character just received
1. Not defined but normally MSB of character just received
SS
SS
NOTE
SEE
7
SLAVE
2
5
7
2
MSB IN
SLAVE
4
5
MCF51CN128 ColdFire Microcontroller Data Sheet, Rev. 4
9
MSB IN
MSB OUT
1
6
4
Figure 25. SPI Slave Timing (CPHA = 0)
Figure 26. SPI Slave Timing (CPHA = 1)
MSB OUT
6
4
1
4
BIT 6 . . . 1
BIT 6 . . . 1
9
12
11
BIT 6 . . . 1
10
BIT 6 . . . 1
11
12
10
SLAVE LSB OUT
LSB IN
SLAVE LSB OUT
11
12
3
LSB IN
12
11
10
3
NOTE
SEE
Electrical Characteristics
8
8
31