MC56F8037VLH Freescale Semiconductor, MC56F8037VLH Datasheet - Page 117

IC DSP 16BIT DUAL 64-LQFP

MC56F8037VLH

Manufacturer Part Number
MC56F8037VLH
Description
IC DSP 16BIT DUAL 64-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8037VLH

Core Processor
56800
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
4K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LQFP
Data Bus Width
16 bit
Processor Series
MC56F80xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
32 MIPs
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
53
Data Ram Size
8 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
MC56F8037EVM
Interface Type
SCI, SPI, I2C
Minimum Operating Temperature
- 40 C
Package
64LQFP
Family Name
56F8xxx
Maximum Speed
32 MHz
On-chip Adc
2(8-chx10-bit)
On-chip Dac
2-chx12-bit
Number Of Timers
5
For Use With
MC56F8037EVM - BOARD EVAL FOR MC56F8037
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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6.3.18.9
This bit field is reserved. It must be set to 0.
6.3.18.10 Configure GPIOB0 (GPS_B0)—Bits 0
This field selects the alternate function for GPIOB0.
6.3.19
See
6.3.19.1
This bit field is reserved. Each bit must be set to 0.
6.3.19.2
This field selects the alternate function for GPIOB11.
6.3.19.3
This bit field is reserved. It must be set to 0.
6.3.19.4
This field selects the alternate function for GPIOB10.
6.3.19.5
This bit field is reserved. It must be set to 0.
Freescale Semiconductor
Section 6.3.16
Base + $16
RESET
Write
Read
0 = SS0 - QSPI0 Slave Select (default)
1 = SDA - I2C Serial Data
0 = SCLK0 - QSPI0 Serial Clock (default)
1 = SCL - I
0 = CMPBO - Comparator B Output (default)
1 = TB1 - Timer B1
0 = CMPAO - Comparator A Output (default)
1 = TB0 - Timer B0
Figure 6-22 GPIO Peripheral Select Register 1 for GPIOB (SIM_GPSB1)
SIM GPIO Peripheral Select Register 1 for GPIOB (SIM_GPSB1)
Reserved—Bit 1
Reserved—Bits 15–9
Configure GPIOB11 (GPS_B11)—Bit 8
Reserved—Bit 7
Configure GPIOB10 (GPS_B10)—Bit 6
Reserved—Bit 5
15
0
0
2
C Serial Clock
for general information about GPIO Peripheral Select Registers.
14
0
0
13
0
0
12
0
0
56F8037/56F8027 Data Sheet, Rev. 7
11
0
0
10
0
0
9
0
0
GPS_
B11
8
0
7
0
0
GPS_
B10
6
0
5
0
0
GPS_
B9
4
0
3
0
0
GPS_
B8
2
0
Register Descriptions
1
0
0
GPS_
B7
0
0
117

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