C8051F045-GQ Silicon Laboratories Inc, C8051F045-GQ Datasheet - Page 142
![IC 8051 MCU 64K FLASH 64TQFP](/photos/12/18/121883/c8051f045-gq_sml.jpg)
C8051F045-GQ
Manufacturer Part Number
C8051F045-GQ
Description
IC 8051 MCU 64K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F04xr
Specifications of C8051F045-GQ
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
64-TQFP, 64-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
CAN/SMBus/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
32
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F040DK
Minimum Operating Temperature
- 40 C
On-chip Adc
13-ch x 10-bit
On-chip Dac
2-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1210
Available stocks
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Manufacturer:
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C8051F045-GQ
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C8051F040/1/2/3/4/5/6/7
142
Bits7-1:
Bit0:
Bits7-0:
R/W
Bit7
Bit7
R
-
Reserved.
SFRPGEN: SFR Automatic Page Control Enable.
Upon interrupt the C8051 Core will vector to the specified interrupt service routine and auto-
matically switch the SFR page to the corresponding peripheral or function’s SFR page. This
bit is used to control this autopaging function.
0: SFR Automatic Paging disabled. C8051 core will not automatically change to the appro-
priate SFR page (i.e., the SFR page that contains the SFR’s for the peripheral/function that
was the source of the interrupt).
1: SFR Automatic Paging enabled. Upon interrupt, the CIP-51 will switch the SFR page to
the page that contains the SFR’s for the peripheral or function that is the source of the inter-
rupt.
SFRPAGE: SFR Page Register.
Byte represents the SFR page the CIP-51 uses when reading or modifying SFR’s.
SFR page context is retained upon interrupts/return from interrupts in a 3 byte SFR Page
Stack: SFRPAGE is the first entry, SFRNEXT is the second, and SFRLAST is third entry.
The SFRPAGE, SFRSTACK, and SFRLAST bytes may be used alter the context in the SFR
Page Stack. Only interrupts and returns from interrupt service routines push and pop the
SFR Page Stack. (See
Write:
Sets the SFR Page
Read:
Byte is the SFR page the CIP-51 MCU is using.
SFR Definition 12.1. SFR Page Control Register: SFRPGCN
R/W
Bit6
Bit6
R
-
SFR Definition 12.2. SFR Page Register: SFRPAGE
R/W
Bit5
Bit5
R
-
Section 12.2.6.2
R/W
Bit4
Bit4
R
-
Rev. 1.5
R/W
Bit3
Bit3
R
-
and
Section 12.2.6.3
R/W
Bit2
Bit2
R
-
R/W
Bit1
Bit1
R
for further information.)
-
SFRPGEN 00000001
SFR Address:
SFR Address:
SFR Page:
SFR Page:
R/W
R/W
Bit0
Bit0
0x81
All Pages
0x84
All Pages
Reset Value
00000000
Reset Value
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