M3062LFGPFP#U5C Renesas Electronics America, M3062LFGPFP#U5C Datasheet - Page 126

IC M16C/62P MCU FLASH 100-QFP

M3062LFGPFP#U5C

Manufacturer Part Number
M3062LFGPFP#U5C
Description
IC M16C/62P MCU FLASH 100-QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheet

Specifications of M3062LFGPFP#U5C

Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
12.4
Figure 12.2
12.4.1
Table 12.1
NOTES:
Undefined Instruction (UND instruction)
Overflow (INTO instruction)
BRK Instruction
Address Match
Single Step
Watchdog Timer,
Oscillation Stop and Re-Oscillation
Detection,
Low Voltage Detection
DBC
NMI
Reset
One interrupt vector consists of 4 bytes. Set the start address of each interrupt routine in the respective interrupt
vectors. When an interrupt request is accepted, the CPU branches to the address set in the corresponding interrupt
vector. Figure 12.2 shows the Interrupt Vector.
1. Do not normally use this interrupt because it is provided exclusively for use by development tools.
2. If the contents of address FFFE7h is FFh, program execution starts from the address shown by the
The fixed vector tables are allocated to the addresses from FFFDCh to FFFFFh. Table 12.1 lists the Fixed
Vector Tables. In the flash memory version of microcomputer, the vector addresses (H) of fixed vectors are used
by the ID code check function. For details, refer to the 22.2 Functions To Prevent Flash Memory from
Rewriting.
(1)
vector in the relocatable vector table.
Interrupts and Interrupt Vector
Jan 10, 2006
Fixed Vector Tables
(1)
Interrupt Vector
Fixed Vector Tables
Interrupt Source
(2)
Vector address (H)
Vector address (L)
Page 109 of 390
MSB
FFFDCh to FFFDFh
FFFE0h to FFFE3h
FFFE4h to FFFE7h
FFFE8h to FFFEBh
FFFECh to FFFEFh
FFFF0h to FFFF3h
FFFF4h to FFFF7h
FFFF8h to FFFFBh
FFFFCh to FFFFFh
Address (L) to Address (H)
Vector Table Addresses
0 0 0 0
0 0 0 0
Middle-order address
Low-order address
High-order
address
0 0 0 0
M16C/60, M16C/20 Series
software manual
12.9 Address Match Interrupt
13. Watchdog Timer
10. Clock Generation Circuit
6. Voltage Detection Circuit
12.7 NMI interrupt
5. Reset
LSB
Reference
12. Interrupt

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