DSPIC30F3010-20I/ML Microchip Technology, DSPIC30F3010-20I/ML Datasheet - Page 67
![IC DSPIC MCU/DSP 24K 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
DSPIC30F3010-20I/ML
Manufacturer Part Number
DSPIC30F3010-20I/ML
Description
IC DSPIC MCU/DSP 24K 44QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F3010-30ISO.pdf
(228 pages)
2.DSPIC30F3010-30ISO.pdf
(18 pages)
3.DSPIC30F3010-30ISO.pdf
(6 pages)
4.DSPIC30F3010-30ISO.pdf
(16 pages)
5.DSPIC30F3010-30ISO.pdf
(22 pages)
6.DSPIC30F3010-20ISP.pdf
(226 pages)
Specifications of DSPIC30F3010-20I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
24KB (8K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
20
Flash Memory Size
24KB
Supply Voltage Range
2.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44QFN4 - SOCKET TRANS ICE 28DIP TO 44QFNAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F301020IML
- DSPIC30F3010-30ISO PDF datasheet
- DSPIC30F3010-30ISO PDF datasheet #2
- DSPIC30F3010-30ISO PDF datasheet #3
- DSPIC30F3010-30ISO PDF datasheet #4
- DSPIC30F3010-30ISO PDF datasheet #5
- DSPIC30F3010-20ISP PDF datasheet #6
- Current page: 67 of 228
- Download datasheet (4Mb)
9.0
This section describes the 16-bit general purpose
Timer1 module and associated operational modes.
Figure 9-1
16-bit Timer1 module.
The following sections provide a detailed description,
including setup and control registers along with
associated block diagrams for the operational modes of
the timers.
The Timer1 module is a 16-bit timer which can serve as
the time counter for the Real-time Clock (RTC), or
operate as a free-running interval timer/counter. The
16-bit timer has the following modes:
• 16-bit Timer
• 16-bit Synchronous Counter
• 16-bit Asynchronous Counter
Further, the following operational characteristics are
supported:
• Timer gate operation
• Selectable prescaler settings
• Timer operation during CPU Idle and Sleep
• Interrupt on 16-bit Period register match or falling
© 2010 Microchip Technology Inc.
Note:
Note:
modes
edge of external gate signal
TIMER1 MODULE
depicts the simplified block diagram of the
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals, register descriptions and
general device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046).
Timer1 is a ‘Type A’ timer. Refer to
S e c t i o n 2 3 . 0
Characteristics”, for the specifications for
a Type A timer.
“ E l e c t r i c a l
These operating modes are determined by setting the
appropriate bit(s) in the 16-bit SFR, T1CON.
presents a block diagram of the 16-bit timer module.
16-Bit Timer Mode: In the 16-Bit Timer mode, the
timer increments on every instruction cycle up to a
match value, preloaded into the Period register, PR1,
then resets to ‘0’ and continues to count.
When the CPU goes into the Idle mode, the timer will
stop incrementing unless the TSIDL bit (T1CON<13>)
the incrementing sequence upon termination of the
CPU Idle mode.
16-bit Synchronous Counter Mode: In the 16-bit
Synchronous Counter mode, the timer increments on
the rising edge of the applied external clock signal,
which is synchronized with the internal phase clocks.
The timer counts up to a match value preloaded in PR1,
then resets to ‘0’ and continues.
When the CPU goes into the Idle mode, the timer will
stop incrementing, unless the respective TSIDL bit = 0.
If TSIDL = 1, the timer module logic will resume the
incrementing sequence upon termination of the CPU
Idle mode.
16-Bit Asynchronous Counter Mode: In the 16-Bit
Asynchronous Counter mode, the timer increments on
every rising edge of the applied external clock signal.
The timer counts up to a match value preloaded in PR1,
then resets to ‘0’ and continues.
When the timer is configured for the Asynchronous mode
of operation and the CPU goes into the Idle mode, the
timer will stop incrementing if TSIDL = 1.
= 0. If TSIDL = 1, the timer module logic will resume
dsPIC30F3010/3011
DS70141F-page 67
Figure 9-1
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