PIC18LF2431-I/SP Microchip Technology, PIC18LF2431-I/SP Datasheet - Page 389

IC MCU FLASH 8KX16 28-DIP

PIC18LF2431-I/SP

Manufacturer Part Number
PIC18LF2431-I/SP
Description
IC MCU FLASH 8KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF2431-I/SP

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
24
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
EUSART, I2C, SPI, SSP
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
24
Number Of Timers
1 x 8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM183021, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Equations
Errata .................................................................................... 7
EUSART
External Clock Input ............................................................ 25
F
Fail-Safe Clock Monitor............................................. 269, 283
Fail-Safe Clock Monitor (FSCM) ....................................... 269
Fast Register Stack............................................................. 62
Flash Program Memory ...................................................... 77
© 2007 Microchip Technology Inc.
A/D Acquisition Time................................................. 255
Conversion Time for Multi-Channel Modes............... 260
Minimum A/D Holding Capacitor
PWM Period for Continuous Up/Down
PWM Period for Free-Running Mode........................ 193
PWM Resolution ....................................................... 193
16 x 16 Signed Multiplication Algorithm ...................... 92
16 x 16 Unsigned Multiplication Algorithm .................. 92
Asynchronous Mode ................................................. 232
Baud Rate Generator (BRG)..................................... 227
Serial Port Enable (SPEN Bit)................................... 223
Synchronous Master Mode ....................................... 239
Synchronous Slave Mode ......................................... 242
Exiting ....................................................................... 283
Interrupts in Power-Managed Modes........................ 284
POR or Wake From Sleep ........................................ 284
WDT During Oscillator Failure .................................. 283
Associated Registers .................................................. 85
Control Registers ........................................................ 78
Erase Sequence ......................................................... 82
Erasing........................................................................ 82
Operation During Code-Protect .................................. 85
Reading....................................................................... 81
TABLAT Register ........................................................ 80
Table Pointer............................................................... 80
Table Pointer Boundaries ........................................... 80
Table Reads and Table Writes ................................... 77
Charging Time .................................................. 255
Count Mode ...................................................... 193
Associated Registers, Receive ......................... 236
Associated Registers, Transmit ........................ 234
Auto-Wake-up on Sync Break .......................... 237
Receiver............................................................ 235
Receiving a Break Character ............................ 238
Setting Up 9-Bit Mode with
Transmitter........................................................ 232
12-Bit Break Character Sequence .................... 238
Associated Registers ........................................ 228
Auto-Baud Rate Detect ..................................... 231
Baud Rate Error, Calculating ............................ 228
Baud Rates, Asynchronous Modes .................. 228
High Baud Rate Select (BRGH Bit) .................. 227
Power-Managed Mode Operation..................... 227
Sampling ........................................................... 227
Associated Registers, Receive ......................... 241
Associated Registers, Transmit ........................ 240
Reception.......................................................... 241
Transmission .................................................... 239
Associated Registers, Receive ......................... 243
Associated Registers, Transmit ........................ 242
Reception.......................................................... 243
Boundaries Based on Operation......................... 80
Address Detect ......................................... 235
PIC18F2331/2431/4331/4431
Preliminary
FSCM. See Fail-Safe Clock Monitor.
G
GOTO ............................................................................... 310
H
Hardware Multiplier............................................................. 91
HSPLL ................................................................................ 24
I
I/O Ports ........................................................................... 109
ID Locations.............................................................. 269, 288
INCF ................................................................................. 310
INCFSZ............................................................................. 311
In-Circuit Debugger........................................................... 288
In-Circuit Serial Programming (ICSP)....................... 269, 288
Independent PWM Mode .................................................. 201
Indirect Addressing
Indirect Addressing Operation ............................................ 74
Indirect File Operand .......................................................... 65
INFSNZ............................................................................. 311
Initialization Conditions for All Registers....................... 50–55
Input Capture .................................................................... 161
Instruction Flow/Pipelining .................................................. 63
Instruction Set
Unexpected Termination of Write
Write Sequence .......................................................... 83
Write Verify ................................................................. 85
Writing ........................................................................ 83
Introduction................................................................. 91
Operation.................................................................... 91
Performance Comparison........................................... 91
Duty Cycle Assignment ............................................ 201
INDF and FSR Registers ............................................ 73
Operation.................................................................... 73
Entering and Capture Timing.................................... 167
State Change............................................................ 166
Time Base Reset Summary...................................... 168
ADDLW..................................................................... 295
ADDWF .................................................................... 295
ADDWFC.................................................................. 296
ANDLW..................................................................... 296
ANDWF .................................................................... 297
BC............................................................................. 297
BCF .......................................................................... 298
BN............................................................................. 298
BNC .......................................................................... 299
BNN .......................................................................... 299
BNOV ....................................................................... 300
BNZ .......................................................................... 300
BOV .......................................................................... 303
BRA .......................................................................... 301
BSF........................................................................... 301
BTFSC...................................................................... 302
BTFSS ...................................................................... 302
BTG .......................................................................... 303
BZ ............................................................................. 304
CALL......................................................................... 304
CLRF ........................................................................ 305
CLRWDT .................................................................. 305
COMF ....................................................................... 306
CPFSEQ ................................................................... 306
CPFSGT ................................................................... 307
CPFSLT.................................................................... 307
DAW ......................................................................... 308
Operation............................................................ 85
DS39616C-page 387

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