PIC18LF2523-I/SP Microchip Technology, PIC18LF2523-I/SP Datasheet - Page 24
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PIC18LF2523-I/SP
Manufacturer Part Number
PIC18LF2523-I/SP
Description
IC PIC MCU FLASH 16KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(46 pages)
2.PIC18F2423-ISP.pdf
(54 pages)
3.PIC18F2423-ISP.pdf
(8 pages)
4.PIC18F2423-ISP.pdf
(34 pages)
5.PIC18F2523-ISO.pdf
(392 pages)
Specifications of PIC18LF2523-I/SP
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
1.5KB
Cpu Speed
40MHz
No. Of Timers
4
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
25
Interface Type
I2C/SPI/USART
On-chip Adc
10-chx12-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18F2423/2523/4423/4523
5.0
The
several Configuration Words. These bits can be set or
cleared to select various device configurations. All
other memory areas should be programmed and
verified prior to setting Configuration Words. These bits
may be read out normally, even after read or code
protection. See Table 5-1 for a list of Configuration bits
and device IDs and Table 5-3 for the Configuration bit
descriptions.
5.1
A user may store identification information (ID) in eight
ID locations mapped in 200000h:200007h. It is recom-
mended that the most significant nibble of each ID be
Fh. In doing so, if the user code inadvertently tries to
execute from the ID space, the ID data will execute as
a NOP.
TABLE 5-1:
TABLE 5-2:
DS39759A-page 24
300001h
300002h
300003h
300005h
300006h
300008h
300009h
30000Ah
30000Bh
30000Ch
30000Dh
3FFFFEh DEVID1
3FFFFFh DEVID2
Legend:
Note 1:
Note:
File Name
PIC18F2423/2523/4423/4523
2:
CONFIGURATION WORD
ID Locations
CONFIG1H
CONFIG2L
CONFIG2H
CONFIG3H MCLRE
CONFIG4L DEBUG
CONFIG5L
CONFIG5H
CONFIG6L
CONFIG6H
CONFIG7L
CONFIG7H
x = unknown, - = unimplemented. Shaded cells are unimplemented, read as ‘0’.
Unimplemented in PIC18F2423/4423 devices; maintain this bit set.
DEVID registers are read-only and cannot be programmed by the user.
The ‘x’s in DEVID1 contain the device revision code.
PIC18F2423
PIC18F2523
PIC18F4423
PIC18F4523
Device
CONFIGURATION BITS AND DEVICE IDs
(2)
(2)
DEVICE ID VALUE
DEV11
WRTD
DEV3
IESO
Bit 7
CPD
—
—
—
—
—
—
FCMEN
EBTRB
DEV10
XINST
WRTB
DEV2
Bit 6
CPB
—
—
—
—
—
—
devices
WRTC
DEV1
DEV9
Bit 5
—
—
—
—
—
—
—
—
—
—
have
WDTPS3
BORV1
DEV0
DEV8
Bit 4
—
—
—
—
—
—
—
—
—
DEVID2
11h
11h
10h
10h
EBTR3
WDTPS2
WRT3
FOSC3
BORV0
CP3
REV3
DEV7
5.2
The device ID word for the PIC18F2423/2523/4423/
4523 devices is located at 3FFFFEh:3FFFFFh. These
bits may be used by the programmer to identify what
device type is being programmed and read out
normally, even after code or read protection. See
Table 5-2 for a complete list of device ID values.
FIGURE 5-1:
Bit 3
—
—
—
—
—
(1)
(1)
(1)
Device ID Value
LPT1OSC PBADEN CCP2MX
BOREN1 BOREN0 PWRTEN
WDTPS1 WDTPS0
EBTR2
Device ID Word
WRT2
FOSC2
CP2
REV2
DEV6
Bit 2
LVP
—
—
—
(1)
(1)
(1)
Set TBLPTR = 3FFFFE
READ DEVICE ID WORD FLOW
with Post-Increment
with Post-Increment
FOSC1
EBTR1
Read High Byte
Read Low Byte
WRT1
REV1
DEV5
Bit 1
CP1
—
—
—
—
© 2005 Microchip Technology Inc.
Done
Start
0101 xxxx
0001 xxxx
1101 xxxx
1001 xxxx
STVREN
WDTEN
FOSC0
EBTR0
WRT0
REV0
DEV4
DEVID1
Bit 0
CP0
—
—
—
Unprogrammed
00-- 0111
---1 1111
---1 1111
1--- -011
10-- -1-1
---- 1111
11-- ----
---- 1111
111- ----
---- 1111
-1-- ----
xxxx xxxx
0000 1100
Default/
Value
(2)
(2)