PIC18F4480-I/P Microchip Technology, PIC18F4480-I/P Datasheet - Page 376
PIC18F4480-I/P
Manufacturer Part Number
PIC18F4480-I/P
Description
IC PIC MCU FLASH 8KX16 40DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(46 pages)
3.PIC18F4480-IPT.pdf
(490 pages)
4.PIC18F4480-IPT.pdf
(8 pages)
5.PIC18F4480-IPT.pdf
(6 pages)
6.PIC18F4480-IPT.pdf
(6 pages)
7.PIC18F2580-ESO.pdf
(483 pages)
Specifications of PIC18F4480-I/P
Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI/I2C/MSSP/EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
36
Number Of Timers
4
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163011
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
Package
40PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD444-1001 - DEMO BOARD FOR PICMICRO MCUACICE0206 - ADAPTER MPLABICE 40P 600 MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F4480-I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Company:
Part Number:
PIC18F4480-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F4480-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F4480-IPT PDF datasheet #3
- PIC18F4480-IPT PDF datasheet #4
- PIC18F4480-IPT PDF datasheet #5
- PIC18F4480-IPT PDF datasheet #6
- PIC18F2580-ESO PDF datasheet #7
- Current page: 376 of 490
- Download datasheet (9Mb)
PIC18F2480/2580/4480/4580
BCF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39637D-page 376
Q Cycle Activity:
Before Instruction
After Instruction
Decode
FLAG_REG = C7h
FLAG_REG = 47h
Q1
register ‘f’
Bit Clear f
BCF
0 ≤ f ≤ 255
0 ≤ b ≤ 7
a ∈ [0,1]
0 → f<b>
None
Bit ‘b’ in register ‘f’ is cleared.
If ‘a’ is ‘0’, the Access Bank is selected.
If ‘a’ is ‘1’, the BSR is used to select the
GPR bank.
If ‘a’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f ≤ 95 (5Fh). See
Section 26.2.3 “Byte-Oriented and
Bit-Oriented Instructions in Indexed
Literal Offset Mode” for details.
1
1
BCF
Read
1001
Q2
f, b {,a}
FLAG_REG,
bbba
Process
Data
Q3
ffff
7, 0
register ‘f’
Write
Q4
ffff
BN
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
If Jump:
If No Jump:
Before Instruction
After Instruction
operation
Decode
Decode
PC
If Negative
If Negative
No
Q1
Q1
PC
PC
Read literal
Read literal
operation
Branch if Negative
BN
-128 ≤ n ≤ 127
if Negative bit is ‘1’,
(PC) + 2 + 2n → PC
None
If the Negative bit is ‘1’, then the
program will branch.
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will have
incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is then a
two-cycle instruction.
1
1(2)
HERE
1110
No
‘n’
‘n’
Q2
Q2
=
=
=
=
=
© 2009 Microchip Technology Inc.
n
address (HERE)
1;
address (Jump)
0;
address (HERE + 2)
0110
operation
BN
Process
Process
Data
Data
No
Q3
Q3
Jump
nnnn
Write to PC
operation
operation
No
No
Q4
Q4
nnnn
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