C8051F804-GS Silicon Laboratories Inc, C8051F804-GS Datasheet - Page 144

• Manufacturer Part Number: C8051F804-GS
• Description: IC MCU 8BIT 16KB FLASH 16SOIC
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F80xr

Specifications of C8051F804-GS

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Cap Sense, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 13
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-SOIC (3.9mm Width)
• Processor Series: C8051F8x
• Core: 8051
• Data Bus Width: 16 bit
• Data Ram Size: 512 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F800DK
• Minimum Operating Temperature: - 55 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1773-5

C8051F80x-83x
144
Figure 23.4. Priority Crossbar Decoder Potential Pin Assignments
Pins P0.0-P1.7
The crossbar peripherals are assigned in priority order from top to bottom,
according to this diagram.
a peripheral.
these signals are enabled, the Crossbar should be manually configured to
skip the corresponding port pins.
Notes:
1. P1.4-P1.7 are not available on 16-pin packages.
2. NSS is only pinned out when the SPI is in 4-wire mode.
Pin Number
These boxes represent Port pins which can potentially be assigned to
Special Function Signals are not assigned by the crossbar. When
Pins can be “skipped” by setting the corresponding bit in PnSKIP to ‘1’.
SYSCLK
Function
Pin Skip
Settings
Special
Signals
CP0A
CEX0
CEX1
CEX2
MISO
MOSI
NSS
SCK
SDA
RX0
SCL
CP0
Port
TX0
ECI
T0
T1
2
0
0
1
are capable of being assigned to crossbar peripherals.
1
0
2
0
P0SKIP
3
0
P0
4
0
5
0
Rev. 1.0
6
0
7
0
0
0
1
0
2
0
P1SKIP
3
0
P1
4
0
1
5
0
1
6
0
1
7
0
1
0