C8051F353-GM Silicon Laboratories Inc, C8051F353-GM Datasheet - Page 204
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C8051F353-GM
Manufacturer Part Number
C8051F353-GM
Description
IC 8051 MCU 8K FLASH 28MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F35xr
Specifications of C8051F353-GM
Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x16b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F350DK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 16-bit
On-chip Dac
2-ch x 8-bit
No. Of I/o's
17
Ram Memory Size
768Byte
Cpu Speed
50MHz
No. Of Timers
4
Rohs Compliant
Yes
Package
28QFN
Device Core
8051
Family Name
C8051F35x
Maximum Speed
50 MHz
Data Rom Size
128 B
Height
0.88 mm
Length
5 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Width
5 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1083 - DEV KIT FOR F350/351/352/353
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1273
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F353-GM
Manufacturer:
SiliconL
Quantity:
8 050
C8051F350/1/2/3
22.2.2. 8-bit Timers with Auto-Reload
When T2SPLIT is set, Timer 2 operates as two 8-bit timers (TMR2H and TMR2L). Both 8-bit timers oper-
ate in auto-reload mode as shown in Figure 22.5. TMR2RLL holds the reload value for TMR2L; TMR2RLH
holds the reload value for TMR2H. The TR2 bit in TMR2CN handles the run control for TMR2H. TMR2L is
always running when configured for 8-bit Mode.
Each 8-bit timer may be configured to use SYSCLK, SYSCLK divided by 12, or the external oscillator clock
source divided by 8. The Timer 2 Clock Select bits (T2MH and T2ML in CKCON) select either SYSCLK or
the clock defined by the Timer 2 External Clock Select bit (T2XCLK in TMR2CN), as follows:
The TF2H bit is set when TMR2H overflows from 0xFF to 0x00; the TF2L bit is set when TMR2L overflows
from 0xFF to 0x00. When Timer 2 interrupts are enabled (IE.5), an interrupt is generated each time
TMR2H overflows. If Timer 2 interrupts are enabled and TF2LEN (TMR2CN.5) is set, an interrupt is gener-
ated each time either TMR2L or TMR2H overflows. When TF2LEN is enabled, software must check the
TF2H and TF2L flags to determine the source of the Timer 2 interrupt. The TF2H and TF2L interrupt flags
are not cleared by hardware and must be manually cleared by software.
204
External Clock / 8
T2MH
0
0
1
SYSCLK / 12
T2XCLK
T2XCLK
0
1
X
0
1
Figure 22.5. Timer 2 8-Bit Mode Block Diagram
SYSCLK
External Clock / 8
TMR2H Clock
SYSCLK / 12
SYSCLK
Source
0
1
1
0
M
T
3
H
M
T
3
L
CKCON
M
T
2
H
M
T
2
L
M
T
1
M
T
0
TR2
S
C
A
1
S
C
A
0
Rev. 1.1
TCLK
TCLK
TMR2RLH
TMR2RLL
TMR2H
TMR2L
T2ML
Reload
Reload
0
0
1
T2XCLK
T2SPLIT
TF2LEN
T2XCLK
X
0
1
TF2H
TF2L
TR2
External Clock / 8
TMR2L Clock
SYSCLK / 12
SYSCLK
Source
Interrupt