C8051F349-GM Silicon Laboratories Inc, C8051F349-GM Datasheet - Page 251

• Manufacturer Part Number: C8051F349-GM
• Description: IC 8051 MCU 32K FLASH MEM 32-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F34xr

Specifications of C8051F349-GM

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 32-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 25
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 2304 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-F34X, KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F340DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1748 - ADAPTER TOOLSTICK FOR C8051F34X
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1349-5

21.3.3. USB Start-of-Frame Capture
When T3CE = ‘1’, Timer 3 will operate in one of two special capture modes. The capture event can be
selected between a USB Start-of-Frame (SOF) capture, and a Low-Frequency Oscillator (LFO) Rising
Edge capture, using the T3CSS bit. The USB SOF capture mode can be used to calibrate the system clock
or external oscillator against the known USB host SOF clock. The LFO rising-edge capture mode can be
used to calibrate the internal Low-Frequency Oscillator against the internal High-Frequency Oscillator or
an external clock source. When T3SPLIT = ‘0’, Timer 3 counts up and overflows from 0xFFFF to 0x0000.
Each time a capture event is received, the contents of the Timer 3 registers (TMR3H:TMR3L) are latched
into the Timer 3 Reload registers (TMR3RLH:TMR3RLL). A Timer 3 interrupt is generated if enabled.
External Clock / 8
SYSCLK / 12
SYSCLK
H
T
F
3
Figure 21.10. Timer 3 Capture Mode (T3SPLIT = ‘0’)
T
F
3
L
USB Start-of-Frame (SOF)
Low-Frequency Oscillator
TMR3CN
E
N
T
F
3
L
T
3
C
E
S
P
T
3
L
T
I
Falling Edge
T
R
3
T
C
S
S
3
C
T
3
X
L
K
0
1
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
M
T
3
H
M
T
3
L
0
1
CKCON
M
T
2
H
T
M
2
L
M
T
1
M
T
0
C
S
A
1
T3CSS
TR3
S
C
A
0
0
1
Rev. 1.3
Enable
Capture
TCLK
TMR3RLL TMR3RLH
TMR3L
Interrupt
TMR3H
To ADC
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