M30878FJGP#U3 Renesas Electronics America, M30878FJGP#U3 Datasheet - Page 103
M30878FJGP#U3
Manufacturer Part Number
M30878FJGP#U3
Description
IC M32C/87 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet
1.M3087BFLGPU3.pdf
(629 pages)
Specifications of M30878FJGP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
31K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 79 of 587
8.2.8
Table 8.9
8.2.9
A0 to A22, A23
D0 to D15
RD, WR, WRL, WRH
BHE
CS
ALE
Table 8.9 lists external bus states when the internal space is accessed.
The bus clock can be output from the BCLK pin in memory expansion mode and microprocessor mode. To
output the bus clock, set the PM07 bit in the PM0 register to 0 (BCLK output) and bits CM01 and CM00 in the
CM0 register to 00b (I/O port P5_3). No BCLK is output in single-chip mode.
Refer to 9. Clock Generation Circuits for details.
External Bus States when Accessing Internal Space
BCLK Output
Item
External Bus States when Accessing Internal Space
Hold the last accessed address in the external space
High-impedance
Outputs “H”
Holds the output level at the time when the MCU accessed the external
space or SFR area for the last time
Outputs “H”
Outputs ALE signal
State when Accessing SFR, Internal ROM, and Internal RAM
8. Bus
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